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公开(公告)号：US07847864B1
公开(公告)日：2010-12-07
申请号：US10372427
申请日：2003-02-21
申请人： Steven Jaffe , Tracy C. Denk , Erik Berg , Amy Hundhausen
发明人： Steven Jaffe , Tracy C. Denk , Erik Berg , Amy Hundhausen
IPC分类号： H04N5/40
CPC分类号： H04N5/40 , H04N7/06 , H04N7/08 , H04N21/4122
摘要： All digital RF modulator. An RF modulator, implemented using only digital techniques, obviates the need for an additional board, implemented using discrete analog components, to perform the necessary modulation to provide the RF output signal for use with a display device (television). Modern displays typically include functionality to support a number of input types beyond an RF input. However, older, legacy displays typically only support inputs that are RF in nature. A fully integrated solution that performs the RF modulation of the output signal that may be used in such legacy types systems is provided using digital techniques.
摘要翻译： 所有数字RF调制器。 仅使用数字技术实现的RF调制器避免了使用离散模拟组件实现的附加板来执行必要的调制以提供与显示设备（电视）一起使用的RF输出信号的需要。 现代显示器通常包括支持RF输入以外的多种输入类型的功能。 然而，较旧的遗留显示器通常仅支持RF性质的输入。 使用数字技术提供了可以在这种传统类型系统中使用的输出信号的RF调制的完全集成的解决方案。
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2.发明授权Mechanism for using clamping and offset techniques to adjust the spectral and wideband gains in the feedback loops of a BTSC encoder 有权使用钳位和补偿技术来调整BTSC编码器的反馈回路中的频谱和宽带增益的机制公开(公告)号：US07277860B2
公开(公告)日：2007-10-02
申请号：US10784690
申请日：2004-02-23
IPC分类号： G10L21/00
摘要： An integrated digital BTSC encoder substantially implemented on a single CMOS integrated circuit is described. By saturating and adding offsets to the value of the feedback control signal in regions of operation where the calculation for the control signal is dominated by noise, an integrated circuit selectively adjusts the control signal for the spectral or wideband feedback loop, as required, so that the performance of a very low noise digital BTSC encoder complies with the requirements of the BTSC standard.
摘要翻译： 描述了基本上在单个CMOS集成电路上实现的集成数字BTSC编码器。 通过在控制信号的计算由噪声控制的操作区域中对反馈控制信号的值进行饱和和相加补偿，集成电路根据需要选择性地调整用于频谱或宽带反馈回路的控制信号，使得 低噪声数字BTSC编码器的性能符合BTSC标准的要求。
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公开(公告)号：US07750975B2
公开(公告)日：2010-07-06
申请号：US12269140
申请日：2008-11-12
CPC分类号： H04N7/06
摘要： An integrated digital BTSC encoder with an improved pilot signal generator substantially implemented on a single CMOS integrated circuit. By digitally generating a sinusoid that is frequency locked to a two-state input reference signal using a high rate internal clock, a hardware-efficient BTSC pilot signal generator is provided with good acquisition and tracking performance. Implemented efficiently as a simple phase detector, a low-complexity loop filter, a pilot frequency offset adder, a phase accumulator and a sinusoidal generator, the invention enables lower-rate post-processing of the pilot tone without a costly variable interpolator decimator structures.
摘要翻译： 具有改进的导频信号发生器的集成数字BTSC编码器基本上实现在单个CMOS集成电路上。 通过使用高速率内部时钟数字地产生频率锁定到两状态输入参考信号的正弦曲线，提供了具有良好的采集和跟踪性能的硬件高效的BTSC导频信号发生器。 作为简单的相位检测器，低复杂度环路滤波器，导频偏移加法器，相位累加器和正弦发生器有效地实现，本发明实现了导频音调的低速后处理，而没有昂贵的可变内插器抽取器结构。
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4.发明授权Mechanism for using the allpass decomposition architecture for the cauer low pass filter used in a BTSC 失效用于BTSC编码器中使用的低通滤波器的全通分解架构的机制公开(公告)号：US07532728B2
公开(公告)日：2009-05-12
申请号：US10784574
申请日：2004-02-23
IPC分类号： H04R5/00
摘要： An BTSC encoder with an improved digital filter structure substantially implemented on a single CMOS integrated circuit is described. By cascading first and second order allpass filter structures to form a higher order digital filter, such as a Cauer low pass filter, limit cycle oscillations are reduced or eliminated, word-length growth from one stage to the next is contained, and a more efficient overall filter structure and performance is obtained.
摘要翻译： 描述了基本上在单个CMOS集成电路上实现的具有改进的数字滤波器结构的BTSC编码器。 通过级联第一和第二级全通滤波器结构以形成诸如Cauer低通滤波器的高阶数字滤波器，限制周期振荡被减少或消除，包含从一个阶段到下一个阶段的字长增长，并且更有效 获得整体过滤器结构和性能。
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公开(公告)号：US20050039218A1
公开(公告)日：2005-02-17
申请号：US10784863
申请日：2004-02-23
CPC分类号： H04H20/88
摘要： An integrated digital BTSC encoder substantially implemented on a single CMOS integrated circuit is described. By incorporating a BTSC encoder within an all digital RF modulator, an improved set top box is provided, obviating the need for an additional BTSC encoder and modulator board and/or discrete analog components. A fully integrated solution that performs BTSC encoding within the RF modulator may be used with legacy television systems and also with other audio/visual equipment connected to the set top box.
摘要翻译： 描述了基本上实现在单个CMOS集成电路上的集成数字BTSC编码器。 通过在全数字RF调制器中并入BTSC编码器，提供了改进的机顶盒，从而避免了额外的BTSC编码器和调制器板和/或离散模拟组件的需要。 在RF调制器中执行BTSC编码的完全集成解决方案可以与传统电视系统一起使用，并且还可以与连接到机顶盒的其它音频/视频设备一起使用。
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公开(公告)号：US20090059069A1
公开(公告)日：2009-03-05
申请号：US12269140
申请日：2008-11-12
IPC分类号： H04N7/00
CPC分类号： H04N7/06
摘要： An integrated digital BTSC encoder with an improved pilot signal generator substantially implemented on a single CMOS integrated circuit. By digitally generating a sinusoid that is frequency locked to a two-state input reference signal using a high rate internal clock, a hardware-efficient BTSC pilot signal generator is provided with good acquisition and tracking performance. Implemented efficiently as a simple phase detector, a low-complexity loop filter, a pilot frequency offset adder, a phase accumulator and a sinusoidal generator, the invention enables lower-rate post-processing of the pilot tone without a costly variable interpolator decimator structures.
摘要翻译： 具有改进的导频信号发生器的集成数字BTSC编码器基本上实现在单个CMOS集成电路上。 通过使用高速率内部时钟数字地产生频率锁定到两状态输入参考信号的正弦曲线，提供了具有良好的采集和跟踪性能的硬件高效的BTSC导频信号发生器。 作为简单的相位检测器，低复杂度环路滤波器，导频偏移加法器，相位累加器和正弦发生器有效地实现，本发明实现了导频音调的低速后处理，而没有昂贵的可变内插器抽取器结构。
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7.发明申请Mechanism for using clamping and offset techniques to adjust the spectral and wideband gains in the feedback loops of a BTSC encoder 有权使用钳位和补偿技术来调整BTSC编码器的反馈回路中的频谱和宽带增益的机制公开(公告)号：US20050038664A1
公开(公告)日：2005-02-17
申请号：US10784690
申请日：2004-02-23
摘要： An integrated digital BTSC encoder substantially implemented on a single CMOS integrated circuit is described. By saturating and adding offsets to the value of the feedback control signal in regions of operation where the calculation for the control signal is dominated by noise, an integrated circuit selectively adjusts the control signal for the spectral or wideband feedback loop, as required, so that the performance of a very low noise digital BTSC encoder complies with the requirements of the BTSC standard.
摘要翻译： 描述了基本上在单个CMOS集成电路上实现的集成数字BTSC编码器。 通过在控制信号的计算由噪声控制的操作区域中对反馈控制信号的值进行饱和和相加补偿，集成电路根据需要选择性地调整用于频谱或宽带反馈回路的控制信号，使得 低噪声数字BTSC编码器的性能符合BTSC标准的要求。
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公开(公告)号：US20050038646A1
公开(公告)日：2005-02-17
申请号：US10784760
申请日：2004-02-23
CPC分类号： H04N7/06
摘要： An integrated digital BTSC encoder with an improved pilot signal generator substantially implemented on a single CMOS integrated circuit is described. By digitally generating a sinusoid that is frequency locked to a two-state input reference signal using a high rate internal clock, a hardware-efficient BTSC pilot signal generator is provided with good acquisition and tracking performance. Implemented efficiently as a simple phase detector, a low-complexity loop filter, a pilot frequency offset adder, a phase accumulator and a sinusoidal generator, the invention enables lower-rate post-processing of the pilot tone without a costly variable interpolator decimator structures.
摘要翻译： 描述了具有基本上在单个CMOS集成电路上实现的改进的导频信号发生器的集成数字BTSC编码器。 通过使用高速率内部时钟数字地产生频率锁定到两状态输入参考信号的正弦曲线，提供了具有良好的采集和跟踪性能的硬件高效的BTSC导频信号发生器。 作为简单的相位检测器，低复杂度环路滤波器，导频偏移加法器，相位累加器和正弦发生器有效地实现，本发明实现了导频音调的低速后处理，而没有昂贵的可变内插器抽取器结构。
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公开(公告)号：US07557862B2
公开(公告)日：2009-07-07
申请号：US10784863
申请日：2004-02-23
CPC分类号： H04H20/88
摘要： An integrated digital BTSC encoder is implemented on a single CMOS integrated circuit chip with an all digital RF modulator. A set top box is provided that allows for a fully integrated solution which may be used with legacy television systems and also with other audio/visual equipment connected to the set top box.
摘要翻译： 集成数字BTSC编码器在具有全数字RF调制器的单个CMOS集成电路芯片上实现。 提供了机顶盒，其允许可以与传统电视系统一起使用的完全集成的解决方案，以及连接到机顶盒的其他音频/视频设备。
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公开(公告)号：US07463310B2
公开(公告)日：2008-12-09
申请号：US10784760
申请日：2004-02-23
CPC分类号： H04N7/06
摘要： An integrated digital BTSC encoder with an improved pilot signal generator substantially implemented on a single CMOS integrated circuit is described. By digitally generating a sinusoid that is frequency locked to a two-state input reference signal using a high rate internal clock, a hardware-efficient BTSC pilot signal generator is provided with good acquisition and tracking performance. Implemented efficiently as a simple phase detector, a low-complexity loop filter, a pilot frequency offset adder, a phase accumulator and a sinusoidal generator, the invention enables lower-rate post-processing of the pilot tone without a costly variable interpolator decimator structures.
摘要翻译： 描述了具有基本上在单个CMOS集成电路上实现的改进的导频信号发生器的集成数字BTSC编码器。 通过使用高速率内部时钟数字地产生频率锁定到两状态输入参考信号的正弦曲线，提供了具有良好的采集和跟踪性能的硬件高效BTSC导频信号发生器。 作为简单的相位检测器，低复杂度环路滤波器，导频偏移加法器，相位累加器和正弦发生器有效地实现，本发明实现了导频音调的低速后处理，而没有昂贵的可变内插器抽取器结构。
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