公开(公告)号：US20140006767A1

公开(公告)日：2014-01-02

申请号：US13993310

申请日：2011-12-29

申请人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Charan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

发明人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Charan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

IPC分类号： G06F9/44

CPC分类号： G06F9/4405 ,  G06F15/177

摘要： Following a restart or a reboot of a system that includes a multi-core processor, the multi-core processor may assign one of the cores as a boot strap processor (BSP). Initialization logic may detect a state of each of the plurality of processing cores as active or inactive. The initialization logic may detect an attribute of each of the plurality of processing cores as eligible to be assigned as a BSP or as ineligible to be assigned as the BSP. The initialization logic may detect a last processing core of the plurality of processing cores in the interconnect that is an active processing core based at least in part on the state and is eligible to be assigned as the BSP based at least in part on the attribute. In various embodiments, the initialization information may assign the last processing core as the BSP.

摘要翻译： 在重新启动或重新启动包括多核处理器的系统之后，多核处理器可以将一个核心分配为引导带处理器（BSP）。 初始化逻辑可以将多个处理核心中的每一个的状态检测为活动或不活动。 初始化逻辑可以检测多个处理核心中的每一个的属性被认定为被分配为BSP，或者不符合被分配为BSP的资格。 初始化逻辑可以至少部分地基于状态来检测作为活动处理核心的互连中的多个处理核心的最后处理核心，并且至少部分地基于该属性将其分配为BSP。 在各种实施例中，初始化信息可以将最后的处理核分配为BSP。

公开(公告)号：US20140156896A1

公开(公告)日：2014-06-05

申请号：US13994104

申请日：2011-12-29

申请人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

发明人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

IPC分类号： G06F13/24

CPC分类号： G06F13/24

摘要： Following a restart or a reboot of a system that includes a multi-core processor, the multi-core processor may assign each active and eligible core a unique advanced programmable interrupt controller (APIC) identifier (ID). Initialization logic may detect a state of each of the plurality of processing cores as active or inactive. The initialization logic may detect an attribute of each of the plurality of processing cores as eligible to be assigned an APIC ID or as ineligible to be assigned the APIC ID.

摘要翻译： 在重新启动或重启包含多核处理器的系统之后，多核处理器可以为每个活动和合格的核心分配唯一的高级可编程中断控制器（APIC）标识符（ID）。 初始化逻辑可以将多个处理核心中的每一个的状态检测为活动或不活动。 初始化逻辑可以检测多个处理核心中的每个处理核心的属性符合分配APIC ID的资格，或者不符合APIC ID分配的资格。

公开(公告)号：US09658861B2

公开(公告)日：2017-05-23

申请号：US13993310

申请日：2011-12-29

申请人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

发明人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

IPC分类号： G06F9/44 ,  G06F15/177

CPC分类号： G06F9/4405 ,  G06F15/177

摘要： Following a restart or a reboot of a system that includes a multi-core processor, the multi-core processor may assign one of the cores as a boot strap processor (BSP). Initialization logic may detect a state of each of the plurality of processing cores as active or inactive. The initialization logic may detect an attribute of each of the plurality of processing cores as eligible to be assigned as a BSP or as ineligible to be assigned as the BSP. The initialization logic may detect a last processing core of the plurality of processing cores in the interconnect that is an active processing core based at least in part on the state and is eligible to be assigned as the BSP based at least in part on the attribute. In various embodiments, the initialization information may assign the last processing core as the BSP.

公开(公告)号：US09372816B2

公开(公告)日：2016-06-21

申请号：US13994104

申请日：2011-12-29

申请人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

发明人： Steven S. Chang ,  Anshuman Thakur ,  Ramacharan Sundararaman ,  Ramon Matas ,  Jay S. Lawlor ,  Robert F. Netting

IPC分类号： G06F13/00 ,  G06F13/24

CPC分类号： G06F13/24

摘要： Following a restart or a reboot of a system that includes a multi-core processor, the multi-core processor may assign each active and eligible core a unique advanced programmable interrupt controller (APIC) identifier (ID). Initialization logic may detect a state of each of the plurality of processing cores as active or inactive. The initialization logic may detect an attribute of each of the plurality of processing cores as eligible to be assigned an APIC ID or as ineligible to be assigned the APIC ID.

摘要翻译： 在重新启动或重启包含多核处理器的系统之后，多核处理器可以为每个活动和合格的核心分配唯一的高级可编程中断控制器（APIC）标识符（ID）。 初始化逻辑可以将多个处理核心中的每一个的状态检测为活动或不活动。 初始化逻辑可以检测多个处理核心中的每个处理核心的属性符合分配APIC ID的资格，或者不符合APIC ID分配的资格。