公开(公告)号：US20100246258A1

公开(公告)日：2010-09-30

申请号：US12719184

申请日：2010-03-08

申请人： Sung-Won YUN ,  Kihwan CHOI

发明人： Sung-Won YUN ,  Kihwan CHOI

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5621 ,  G11C16/3436

摘要： A nonvolatile memory device comprises a memory cell array comprising a plurality of memory cells, a voltage generator configured to generate voltages to program the plurality of memory cells, and a control logic component configured to control the voltage generator to provide a plurality of program voltages to selected memory cells during successive iterations of a program loop. Wherein where memory cells corresponding to one logic state are judged to be program passed during a current iteration of the program loop, the control logic component controls the voltage generator such that a program voltage corresponding to the one logic state is skipped during subsequent iterations of the program loop.

摘要翻译： 非易失性存储器件包括存储单元阵列，该存储单元阵列包括多个存储器单元，被配置为产生用于编程多个存储器单元的电压的电压发生器，以及控制逻辑元件，被配置为控制电压发生器以提供多个编程电压 在程序循环的连续迭代期间选择存储单元。 其中对应于一个逻辑状态的存储器单元在程序循环的当前迭代期间被判断为程序传递，控制逻辑部件控制电压发生器，使得在随后的迭代期间跳过对应于一个逻辑状态的编程电压 程序循环。

公开(公告)号：US20140010021A1

公开(公告)日：2014-01-09

申请号：US14023787

申请日：2013-09-11

申请人： Ji-Sang LEE ,  Kihwan CHOI

发明人： Ji-Sang LEE ,  Kihwan CHOI

IPC分类号： G11C16/26

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418

摘要： In one embodiment, the method includes receiving a request to read data stored in a first memory cell associated with a first word line, and performing a first read operation on at least one memory cell associated with a second word line in response to the request. The second word line follows the first word line in a word line programming order, and the first read operation is performed over a first time period. The method further includes performing a second read operation on the first memory cell based on output from the first read operation. The second read operation is performed for a second time period, and the first time period is shorter than the second time period if output from performing the first read operation indicates the first memory cell is not coupled.

摘要翻译： 在一个实施例中，该方法包括接收读取存储在与第一字线相关联的第一存储器单元中的数据的请求，以及响应于该请求对与第二字线相关联的至少一个存储器单元执行第一读取操作。 第二字线在字线编程顺序中跟随第一字线，并且在第一时间段执行第一读取操作。 该方法还包括基于来自第一读取操作的输出对第一存储器单元执行第二读取操作。 如果从执行第一读取操作的输出指示第一存储器单元没有耦合，则第二次读取操作执行第二时间段，并且第一时间段比第二时间段短。

公开(公告)号：US20090084680A1

公开(公告)日：2009-04-02

申请号：US12206221

申请日：2008-09-08

申请人： Doo Soo CHUNG ,  Lichun LIU ,  Kihwan CHOI

发明人： Doo Soo CHUNG ,  Lichun LIU ,  Kihwan CHOI

IPC分类号： B01D59/42

CPC分类号： G01N27/44743 ,  G01N1/405

摘要： A sample stacking method using on-line automatic solid phase extraction coupled to nonaqueous capillary electrophoresis, and an interface structure between a solid-phase preconcentration cartridge and a capillary therefor. The sample analysis method using solid phase extraction coupled to nonaqueous capillary electrophoresis by connecting a solid-phase preconcentration cartridge with a capillary includes: extracting a sample on a solid phase; injecting an elution solvent at an outlet terminal of the capillary, the elution solution desorbing analytes adsorbed onto a solid-phase material of a solid-phase preconcentration cartridge; and injecting a nonaqueous buffer solution from the outlet terminal of the capillary to push the elution solvent to the solid-phase material.

摘要翻译： 使用在线自动固相萃取耦合到非水性毛细管电泳的样品堆叠方法，以及固相预浓缩筒和其毛细管之间的界面结构。 使用固相萃取偶联至非水性毛细管电泳的样品分析方法通过将固相预浓缩滤筒与毛细管连接，包括：在固相上提取样品; 在毛细管的出口端注入洗脱溶剂，洗脱溶液解吸吸附在固相预浓缩筒的固相材料上的分析物; 并从毛细管的出口端注入非水缓冲溶液以将洗脱溶剂推到固相材料中。

公开(公告)号：US20080291737A1

公开(公告)日：2008-11-27

申请号：US12119060

申请日：2008-05-12

申请人： Seunghyun MOON ,  Kihwan CHOI ,  Jaesung SIM ,  Jungdal CHOI

发明人： Seunghyun MOON ,  Kihwan CHOI ,  Jaesung SIM ,  Jungdal CHOI

IPC分类号： G11C16/06

CPC分类号： G11C16/3404

摘要： Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying a programming pulse, an erasing pulse, a time delay, a soft erase pulse, soft programming pulse and/or a verifying pulse as a positive or negative voltage to a portion (for example, a word line or a substrate) of the nonvolatile memory device.

摘要翻译： 编程或擦除具有电荷存储层的非易失性存储器件的方法包括执行至少一个单元编程或擦除循环，每个单元编程或擦除循环包括应用编程脉冲，擦除脉冲，时间延迟，软擦除脉冲， 软编程脉冲和/或验证脉冲作为对非易失性存储器件的一部分（例如，字线或衬底）的正或负电压。