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公开(公告)号:US20220157951A1
公开(公告)日:2022-05-19
申请号:US16950586
申请日:2020-11-17
发明人: Hamza YILMAZ , Aryadeep MRINAL
IPC分类号: H01L29/40 , H01L29/06 , H01L21/265
摘要: A high voltage edge termination structure for a power semiconductor device is provided. The high voltage edge termination structure comprises a semiconductor body of a first conductive type, a JTE region of a second conductive type, a heavily doped channel stop region of the first conductive type, and a plurality of field plates. The JTE region is formed in the semiconductor body, wherein the JTE region is adjacent to an active region of the power semiconductor device. The heavily doped channel stop region is formed in the semiconductor body, wherein the heavily doped channel stop region is spaced apart from the JTE region. The plurality of field plates is formed on the JTE region.
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公开(公告)号:US20180090580A1
公开(公告)日:2018-03-29
申请号:US15686564
申请日:2017-08-25
IPC分类号: H01L29/423 , H01L29/78 , H01L29/10 , H01L29/66
CPC分类号: H01L29/4236 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/513 , H01L29/66666 , H01L29/66727 , H01L29/66734 , H01L29/7813 , H01L29/7827
摘要: A field effect transistor includes a substrate, an epitaxial layer, a remnant-oxide layer, an electrode, a surrounding-oxide layer, a surrounding-nitride layer, a gate oxide layer, a gate, a P-body region, a source region, an interlayer dielectric and a source electrode. The epitaxial layer on the substrate has a trench having a sidewall and a bottom. The electrode inside the trench is coated subsequently by the surrounding-oxide layer, the surrounding-nitride layer and the remnant-oxide layer. The gate formed on the gate oxide layer is separated from the electrode sequentially by the gate oxide layer, the surrounding-nitride layer and the surrounding-oxide layer. The P-body region and the source region, formed at the epitaxial layer, are separated from the gate by the gate oxide layer. The interlayer dielectric covers the source region and the gate. The source electrode covers the P-body region and the interlayer dielectric, and contacts the source region.
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公开(公告)号:US20180053849A1
公开(公告)日:2018-02-22
申请号:US15270498
申请日:2016-09-20
IPC分类号: H01L29/78 , H01L21/306 , H01L21/311 , H01L21/285 , H01L29/40 , H01L29/49 , H01L29/423
CPC分类号: H01L29/7831 , H01L21/28525 , H01L21/30604 , H01L21/31111 , H01L29/401 , H01L29/4236 , H01L29/42376 , H01L29/4916
摘要: A field effect transistor is manufactured by firstly forming an epitaxial layer on a substrate. Then, a trench having an oxide layer is formed on the epitaxial layer. The oxide layer has a first electrode portion having a first width and a first height and a second electrode portion having a second width and a second height. A gate oxide layer covering the oxide layer and the second electrode portion has a gate portion having a third width. The epitaxial layer has a body region and a source region, where these two regions are adjacent to the gate portion and covered by an interlayer dielectric. A source electrode covering the body region and the interlayer dielectric contacts the source region. The first height is no less than the second height, the first width is smaller than the second width, and the second width is smaller than the third width.
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