公开(公告)号：US20170229343A1

公开(公告)日：2017-08-10

申请号：US15495901

申请日：2017-04-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chen-Liang LIAO ,  Chia-Yao LIANG ,  Jui-Long CHEN ,  Sheng-Yuan LIN ,  Yi-Lii HUANG ,  Kuo-Hsi LEE ,  Po-An CHEN

IPC: H01L21/768 ,  H01L21/3213 ,  H01L29/49 ,  H01L21/3205

CPC classification number: H01L21/76834 ,  H01L21/283 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/823437 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/4933

Abstract: A method of forming a semiconductor structure includes; (i) forming an isolation structure in a semiconductor substrate, the isolation structure electrically isolating device regions of the semiconductor substrate; (ii) forming a gate structure extending from one of the device regions to the isolation structure; (iii) forming a resist protective oxide layer overlaying the gate structure and the isolation structure; and (iv) patterning the resist protective oxide layer to form a patterned resist protective oxide that covers at least a portion of the isolation structure and a portion of the gate structure on the isolation structure.

公开(公告)号：US20170011925A1

公开(公告)日：2017-01-12

申请号：US14795751

申请日：2015-07-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chen-Liang LIAO ,  Chia-Yao LIANG ,  Jui-Long CHEN ,  Sheng-Yuan LIN ,  Yi-Lii HUANG ,  Kuo-Hsi LEE ,  Po-An CHEN

IPC: H01L21/283 ,  H01L29/423 ,  H01L29/06 ,  H01L21/3205 ,  H01L21/3213

CPC classification number: H01L21/76834 ,  H01L21/283 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/823437 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/4933

Abstract: A semiconductor structure includes an isolation structure, a gate stack, a spacer and a patterned resist protective oxide. The isolation structure is formed in a semiconductor substrate, and electrically isolates device regions of the semiconductor substrate. The gate stack is located on the isolation structure. The spacer is formed along a sidewall of the gate stack on the isolation structure. The patterned resist protective oxide is located on the isolation structure and covers a sidewall of the spacer such that the spacer is interposed between the patterned resist protective oxide and the gate stack.

Abstract translation: 半导体结构包括隔离结构，栅极堆叠，间隔物和图案化的抗蚀剂保护氧化物。 隔离结构形成在半导体衬底中，并且电隔离半导体衬底的器件区域。 栅极堆叠位于隔离结构上。 间隔件沿着隔离结构上的栅极堆叠的侧壁形成。 图案化的抗蚀剂保护氧化物位于隔离结构上并且覆盖间隔物的侧壁，使得间隔物置于图案化的抗蚀剂保护氧化物和栅极堆叠之间。