公开(公告)号：US20210202502A1

公开(公告)日：2021-07-01

申请号：US16727673

申请日：2019-12-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Fu-Chen CHANG ,  Kuo-Chi TU ,  Tzu-Yu CHEN ,  Sheng-Hung SHIH

IPC: H01L27/1159 ,  G11C11/22 ,  H01L27/11587

Abstract: A semiconductor device includes an inter-metal dielectric layer, a first conductive line, and a first ferroelectric random access memory (FRAM) structure. The first conductive line is embedded in the inter-metal dielectric layer and extends along a first direction. The first FRAM structure is over inter-metal dielectric layer and includes a bottom electrode layer, a ferroelectric layer, and a top electrode layer. The bottom electrode layer is over the first conductive line and has an U-shaped when viewed in a cross section taken along a second direction substantially perpendicular to the first direction. The ferroelectric layer is conformally formed on the bottom electrode. The top electrode layer is over the ferroelectric layer.

公开(公告)号：US20240074206A1

公开(公告)日：2024-02-29

申请号：US18501360

申请日：2023-11-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Fu-Chen CHANG ,  Kuo-Chi TU ,  Tzu-Yu CHEN ,  Sheng-Hung SHIH

IPC: H10B51/30 ,  G11C11/22 ,  H10B51/10 ,  H10B53/00 ,  H10B53/30

CPC classification number: H10B51/30 ,  G11C11/223 ,  H01L28/57 ,  H01L28/60 ,  H10B51/10 ,  H10B53/00 ,  H10B53/30

Abstract: A semiconductor device includes a random access memory (RAM) structure and a dielectric layer. The RAM structure is over a substrate and includes a bottom electrode layer, a ferroelectric layer over the bottom electrode layer, and a top electrode layer over the ferroelectric layer. The dielectric layer is over the substrate and laterally surrounds a lower portion of the RAM structure. From a cross-sectional view, the bottom electrode layer of the RAM structure has a lateral portion and a vertical portion, and the vertical portion upwardly extends from the lateral portion to a position higher than a top surface of the dielectric layer.

公开(公告)号：US20220231033A1

公开(公告)日：2022-07-21

申请号：US17712543

申请日：2022-04-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Fu-Chen CHANG ,  Kuo-Chi TU ,  Tzu-Yu CHEN ,  Sheng-Hung SHIH

IPC: H01L27/1159 ,  H01L27/11587 ,  G11C11/22 ,  H01L49/02 ,  H01L27/11507 ,  H01L27/11502

Abstract: A method of forming a semiconductor device includes forming an inter-metal dielectric layer over a substrate; forming a first conductive line embedded in the inter-metal dielectric layer; forming a dielectric structure over the inter-metal dielectric layer and the first conductive line; etching the dielectric structure until the first conductive line is exposed; forming a bottom electrode layer on the exposed first conductive line such that the bottom electrode layer has an U-shaped when viewed in a cross section; forming a ferroelectric layer over the bottom electrode layer; forming a top electrode layer over the ferroelectric layer.

公开(公告)号：US20210082928A1

公开(公告)日：2021-03-18

申请号：US16569487

申请日：2019-09-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tzu-Yu CHEN ,  Sheng-Hung SHIH ,  Kuo-Chi TU ,  Wen-Ting CHU

IPC: H01L27/1159 ,  H01L23/522

Abstract: A semiconductor device includes a lower intermetal dielectric (IMD) layer, a middle conductive line, and a ferroelectric random access memory (FRAM) structure. The middle conductive line is embedded in the lower IMD layer. The FRAM structure is over the lower IMD layer and the middle conductive line. The FRAM structure includes a bottom electrode, a ferroelectric layer, and a top electrode. The bottom electrode is over the middle conductive line and in contact with the lower IMD layer. The ferroelectric layer is over the bottom electrode. The top electrode is over the ferroelectric layer.