公开(公告)号：US11950430B2

公开(公告)日：2024-04-02

申请号：US17085141

申请日：2020-10-30

Applicant: Ferroelectric Memory GmbH

Inventor： Stefan Ferdinand Müller ,  Patrick Polakowski

IPC: H10B53/30 ,  H01L49/02

CPC classification number: H10B53/30 ,  H01L28/56 ,  H01L28/57 ,  H01L28/65 ,  H01L28/84

Abstract: According to various aspects, a memory cell is provided, the memory cell including: a first electrode; a second electrode; and a memory structure disposed between the first electrode and the second electrode, the first electrode, the second electrode, and the memory structure forming a memory capacitor, wherein at least one of the first electrode or the second electrode includes: a first electrode layer including a first material having a first microstructure; a functional layer in direct contact with the first electrode layer; and a second electrode layer in direct contact with the functional layer, the second electrode layer including a second material having a second microstructure different from the first microstructure.

公开(公告)号：US11949017B2

公开(公告)日：2024-04-02

申请号：US18067633

申请日：2022-12-16

Applicant: Kepler Computing Inc.

Inventor： Ramesh Ramamoorthy ,  Sasikanth Manipatruni ,  Gaurav Thareja

IPC: H01L21/00 ,  H01L29/20 ,  H01L29/66 ,  H01L29/737 ,  H01L29/74 ,  H01L29/786 ,  H01L49/02 ,  H10B53/30 ,  H10B12/00

CPC classification number: H01L29/78618 ,  H01L28/56 ,  H01L28/57 ,  H01L28/60 ,  H01L28/65 ,  H01L29/2003 ,  H01L29/6684 ,  H01L29/7375 ,  H01L29/7408 ,  H01L29/7869 ,  H10B53/30 ,  H10B12/312 ,  H10B12/36

Abstract: The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.

公开(公告)号：US20240074206A1

公开(公告)日：2024-02-29

申请号：US18501360

申请日：2023-11-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Fu-Chen CHANG ,  Kuo-Chi TU ,  Tzu-Yu CHEN ,  Sheng-Hung SHIH

IPC: H10B51/30 ,  G11C11/22 ,  H10B51/10 ,  H10B53/00 ,  H10B53/30

CPC classification number: H10B51/30 ,  G11C11/223 ,  H01L28/57 ,  H01L28/60 ,  H10B51/10 ,  H10B53/00 ,  H10B53/30

Abstract: A semiconductor device includes a random access memory (RAM) structure and a dielectric layer. The RAM structure is over a substrate and includes a bottom electrode layer, a ferroelectric layer over the bottom electrode layer, and a top electrode layer over the ferroelectric layer. The dielectric layer is over the substrate and laterally surrounds a lower portion of the RAM structure. From a cross-sectional view, the bottom electrode layer of the RAM structure has a lateral portion and a vertical portion, and the vertical portion upwardly extends from the lateral portion to a position higher than a top surface of the dielectric layer.

公开(公告)号：US11888067B2

公开(公告)日：2024-01-30

申请号：US18181922

申请日：2023-03-10

Applicant: Kepler Computing Inc.

Inventor： Ramesh Ramamoorthy ,  Sasikanth Manipatruni ,  Gaurav Thareja

IPC: H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L29/20 ,  H01L29/74 ,  H01L29/737 ,  H01L49/02 ,  H10B53/30 ,  H10B12/00

CPC classification number: H01L29/78618 ,  H01L28/56 ,  H01L28/57 ,  H01L28/60 ,  H01L28/65 ,  H01L29/2003 ,  H01L29/6684 ,  H01L29/7375 ,  H01L29/7408 ,  H01L29/7869 ,  H10B53/30 ,  H10B12/312 ,  H10B12/36

Abstract: The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.

公开(公告)号：US11888066B2

公开(公告)日：2024-01-30

申请号：US18067653

申请日：2022-12-16

Applicant: Kepler Computing Inc.

Inventor： Ramesh Ramamoorthy ,  Sasikanth Manipatruni ,  Gaurav Thareja

IPC: H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L29/20 ,  H01L29/74 ,  H01L29/737 ,  H01L49/02 ,  H10B53/30 ,  H10B12/00

CPC classification number: H01L29/78618 ,  H01L28/56 ,  H01L28/57 ,  H01L28/60 ,  H01L28/65 ,  H01L29/2003 ,  H01L29/6684 ,  H01L29/7375 ,  H01L29/7408 ,  H01L29/7869 ,  H10B53/30 ,  H10B12/312 ,  H10B12/36

Abstract: The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.

公开(公告)号：US20230246062A1

公开(公告)日：2023-08-03

申请号：US17649534

申请日：2022-01-31

Applicant: Kepler Computing Inc.

Inventor： Niloy Mukherjee ,  Somilkumar J. Rathi ,  Jason Y. Wu ,  Pratyush Pandey ,  Zeying Ren ,  FNU Atiquzzaman ,  Gabriel Antonio Paulius Velarde ,  Noriyuki Sato ,  Mauricio Manfrini ,  Tanay Gosavi ,  Rajeev Kumar Dokania ,  Amrita Mathuriya ,  Ramamoorthy Ramesh ,  Sasikanth Manipatruni

IPC: H01L49/02 ,  H01L21/324 ,  H01L21/768 ,  H01L27/11507 ,  H01L45/00

CPC classification number: H01L28/57 ,  H01L21/324 ,  H01L21/76832 ,  H01L27/11507 ,  H01L28/65 ,  H01L28/75 ,  H01L45/147

Abstract: A memory device includes a first electrode comprising a first conductive nonlinear polar material, where the first conductive nonlinear polar material comprises a first average grain length. The memory device further includes a dielectric layer comprising a perovskite material on the first electrode, where the perovskite material includes a second average grain length. A second electrode comprising a second conductive nonlinear polar material is on the dielectric layer, where the second conductive nonlinear polar material includes a third grain average length that is less than or equal to the first average grain length or the second average grain length.

公开(公告)号：US20230215952A1

公开(公告)日：2023-07-06

申请号：US18181525

申请日：2023-03-09

Applicant: Kepler Computing Inc.

Inventor： Ramesh Ramamoorthy ,  Sasikanth Manipatruni ,  Gaurav Thareja

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/737 ,  H01L29/20 ,  H01L29/74

CPC classification number: H01L29/78618 ,  H01L29/6684 ,  H01L29/7375 ,  H01L28/60 ,  H01L29/2003 ,  H01L29/7408 ,  H01L28/57 ,  H01L28/65 ,  H10B53/30 ,  H01L29/7869 ,  H01L28/56 ,  H10B12/312 ,  H10B12/36

Abstract: The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer.

公开(公告)号：US11659714B1

公开(公告)日：2023-05-23

申请号：US17315111

申请日：2021-05-07

Applicant: Kepler Computing Inc.

Inventor： Niloy Mukherjee ,  Ramamoorthy Ramesh ,  Sasikanth Manipatruni ,  James Clarkson ,  FNU Atiquzzaman ,  Gabriel Antonio Paulius Velarde ,  Jason Y. Wu

IPC: H01L27/11507 ,  H01L27/11502 ,  H01L49/02 ,  H01L27/11597 ,  H01L27/11592 ,  H01L27/11587

CPC classification number: H01L27/11597 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11587 ,  H01L27/11592 ,  H01L28/55 ,  H01L28/57 ,  H01L28/75

Abstract: Described are ferroelectric device film stacks which include a templating or texturing layer or material deposited below a ferroelectric layer, to enable a crystal lattice of the subsequently deposited ferroelectric layer to template off this templating layer and provide a large degree of preferential orientation despite the lack of epitaxial substrates.

公开(公告)号：US20190237265A1

公开(公告)日：2019-08-01

申请号：US16077064

申请日：2017-01-27

Applicant: TECHNISCHE UNIVERSITÄT DARMSTADT

Inventor： Aldin RADETINAC ,  Arzhang MANI ,  Philipp KOMISSINSKIY ,  Lambert ALFF ,  Mohammad NIKFALAZAR

IPC: H01G7/06

CPC classification number: H01G7/06 ,  H01G4/008 ,  H01G4/1227 ,  H01G4/33 ,  H01L28/57 ,  H01L28/75

Abstract: A micro-electronic electrode assembly having a first electrode arranged on a substrate is provided, wherein the first electrode has a thin layer made of a first electrode material having a solid state lattice, wherein the first electrode material oxidizes upon contact with oxygen-containing compounds and has a perovskite or perovskite-derived crystal structure, and wherein the electrode has a functional surface facing away from the substrate, a separation layer is arranged on the functional surface of the electrode, which prevents an oxidation of the electrode material in the region of the functional surface, the oxidation changing the properties of the electrode. An electrically insulating functional layer is arranged on the separation layer and a second electrode is arranged on the electrically insulating functional layer. According to the invention, advantageously the first electrode material has one of the compounds SrMoO3, SrMoO3-aNa BaMoO3, SrVO3, Of Sr2MoO4, and the separation layer has one of the compounds SeTiO3, DyScO3, GdScO3 or SrHfO3. The functional layer is a compound with the molecular formula BaxSr1−xTi1±yO3+z, preferably Ba0.5Sr0.5TiO3. The electrode assembly forms a varactor.

公开(公告)号：US09595576B2

公开(公告)日：2017-03-14

申请号：US14514008

申请日：2014-10-14

Applicant: Cypress Semiconductor Corporation

Inventor： Shan Sun ,  Tom E. Davenport

IPC: H01L23/29 ,  H01L49/02 ,  H01L27/115

CPC classification number: H01L28/40 ,  H01L23/291 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An encapsulated ferroelectric capacitor or ferroelectric memory cell includes encapsulation materials adjacent to a ferroelectric capacitor, a ferroelectric oxide (FEO) layer over the encapsulated ferroelectric capacitor, and an FEO encapsulation layer over the ferroelectric oxide to provide protection from hydrogen induced degradation.

Abstract translation: 封装的铁电电容器或铁电存储单元包括与强电介质电容器相邻的封装材料，封装的铁电电容器上的铁电氧化物（FEO）层，以及在铁电氧化物上的FEO封装层，以提供防止氢诱导的退化的保护。