公开(公告)号：US20240072046A1

公开(公告)日：2024-02-29

申请号：US17900001

申请日：2022-08-31

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Ting CHUNG ,  Li-Zhen YU ,  Jin CAI

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786

CPC分类号： H01L27/088 ,  H01L21/823412 ,  H01L29/0673 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/78696

摘要： A semiconductor structure includes two source/drain features spaced apart from each other, at least one channel feature disposed between the two source/drain features, a gate dielectric layer disposed on the at least one channel feature, a gate feature, and an electrically conductive capping feature. The gate feature is disposed on the gate dielectric layer and has a first surface, a second surface which is opposite to the first surface, and an interconnect surface which interconnects the first and second surfaces. The electrically conductive capping feature is in direct contact with one of the first and second surfaces of the gate feature, and extends beyond the interconnect surface of the gate feature. Methods for manufacturing the semiconductor structure are also disclosed.

公开(公告)号：US20240234501A1

公开(公告)日：2024-07-11

申请号：US18152448

申请日：2023-01-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuan-Ting PAN ,  Kuo-Cheng CHIANG ,  Shi-Ning JU ,  Jin CAI ,  Chih-Hao WANG

IPC分类号： H01L29/06 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/0673 ,  H01L21/823431 ,  H01L29/42392 ,  H01L29/66545

摘要： A method for forming a semiconductor structure is provided. The method includes forming a first plurality of strip patterns and a second plurality of strip patterns that extend over an epitaxial stack in a first horizontal direction and are alternately arranged in a second horizontal direction perpendicular to the first horizontal direction. The method further includes patterning the first plurality of strip patterns to form a first plurality of island patterns, and patterning the second plurality of strip patterns to form a second plurality of island patterns. The first plurality of island patterns and the second plurality of island patterns are alternately arranged in the second horizontal direction. The method further includes etching the epitaxial stack using the first plurality of island patterns and second plurality of island patterns, thereby forming a fin structure.

公开(公告)号：US20230335617A1

公开(公告)日：2023-10-19

申请号：US17724434

申请日：2022-04-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Mahaveer Sathaiya DHANYAKUMAR ,  Cheng-Ting CHUNG ,  Chien-Hong CHEN ,  Jin CAI ,  Chung-Wei WU

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L21/8234

CPC分类号： H01L29/66545 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/41733 ,  H01L29/66742 ,  H01L29/78621 ,  H01L29/78696 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468

摘要： A method includes forming a dielectric layer over a substrate; forming a carbon nanotube (CNT) over the dielectric layer; forming a dummy gate structure over the CNT; forming gate spacers on opposite sidewalls of the dummy gate structure; forming source/drain epitaxy structures on opposite sides of the dummy gate structure and in contact with opposite sidewalls of the CNT; replacing the dummy gate structure with a metal gate structure; and forming source/drain contacts over the source/drain epitaxy structures, respectively.

公开(公告)号：US20240321988A1

公开(公告)日：2024-09-26

申请号：US18188020

申请日：2023-03-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuo-Cheng CHIANG ,  Guan-Lin CHEN ,  Yu-Xuan HUANG ,  Jin CAI ,  Chih-Hao WANG

IPC分类号： H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/42392 ,  H01L21/823412 ,  H01L21/823418 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78621 ,  H01L29/78696

摘要： A semiconductor structure includes a channel layer, a top source/drain feature, a bottom source/drain feature, a gate structure, and a supporting structure. The channel layer extends in a Z-direction. The top source/drain feature is over and electrically connected to the channel layer. The bottom source/drain feature is under and electrically connected to the channel layer. The gate structure laterally wraps around the channel layer. The supporting structure extends in an X-direction. The supporting structure is in contact with the channel layer, the top source/drain feature, and the bottom source/drain feature in a Y-direction.

公开(公告)号：US20240290863A1

公开(公告)日：2024-08-29

申请号：US18173491

申请日：2023-02-23

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuo-Cheng CHIANG ,  Guan-Lin CHEN ,  Yu-Xuan HUANG ,  Jin CAI ,  Chih-Hao WANG

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/66545 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/7833 ,  H01L29/78696

摘要： Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a channel layer extending along a vertical direction, and a top S/D structure formed on the channel layer. The semiconductor structure also includes a bottom S/D structure formed below the channel layer, and a gate structure adjacent to the channel layer. The channel layer is surrounded by the gate structure. The semiconductor structure includes a top inner spacer layer formed on the gate structure, and a top surface of the channel layer is higher than a bottom surface of the top inner spacer layer.