公开(公告)号：US20240313052A1

公开(公告)日：2024-09-19

申请号：US18674989

申请日：2024-05-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shin-Jiun KUANG ,  Meng-Yu LIN ,  Chung-Wei WU ,  Chun-Fu CHENG

IPC分类号： H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/0673 ,  H01L21/823431 ,  H01L29/0653 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

摘要： Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gate etch back, providing improve gate height control.

公开(公告)号：US20150372142A1

公开(公告)日：2015-12-24

申请号：US14311921

申请日：2014-06-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Shin-Jiun KUANG ,  Yi-Han WANG ,  Tsung-Hsing YU ,  Yi-Ming SHEU

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/7848

摘要： A semiconductor device includes a gate structure located on a substrate; and a raised source/drain region adjacent to the gate structure. An interface is between the gate structure and the substrate. The raised source/drain region includes a stressor layer providing strain to a channel under the gate structure; and a silicide layer in the stressor layer. The silicide layer extends from a top surface of the raised source/drain region and ends below the interface by a predetermined depth. The predetermined depth allows the stressor layer to maintain the strain of the channel.

摘要翻译： 半导体器件包括位于衬底上的栅极结构; 以及与栅极结构相邻的凸起的源极/漏极区域。 界面在栅极结构和衬底之间。 凸起的源极/漏极区域包括向栅极结构下方的沟道施加应力的应力源层; 和应力层中的硅化物层。 硅化物层从升高的源极/漏极区的顶表面延伸并且在界面的下方延伸预定的深度。 预定深度允许应力层维持通道的应变。