公开(公告)号：US12020948B2

公开(公告)日：2024-06-25

申请号：US17377634

申请日：2021-07-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yun-Jui He ,  Chih-Teng Liao

IPC: H01L21/3213 ,  G03F1/70 ,  G06F30/39

CPC classification number: H01L21/32137 ,  G03F1/70 ,  G06F30/39 ,  H01L21/32139

Abstract: Provided are methods of manufacturing integrated circuit that include a polysilicon etch process in which the wafer having an etch poly pattern is loaded into a reactor chamber and exposed to an activated etchant and, during the etch process, adjusting the temperature conditions within the reactor chamber to increase polymeric deposition on an upper surface of the wafer.