-
公开(公告)号：US20240140782A1
公开(公告)日：2024-05-02
申请号：US18404922
申请日：2024-01-05
Inventor： PO CHEN YEH , YI-HSIEN CHANG , FU-CHUN HUANG , CHING-HUI LIN , CHIAHUNG LIU , SHIH-FEN HUANG , CHUN-REN CHENG
CPC classification number: B81B7/007 , B81C1/00301 , B81B2201/0271 , B81B2203/0127 , B81B2207/012 , B81B2207/07 , B81B2207/097 , B81C2203/0792
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
-
Patent Agency Ranking
公开(公告)号：US20210193904A1
公开(公告)日：2021-06-24
申请号：US17194107
申请日：2021-03-05
Inventor： YI HENG TSAI , FU-CHUN HUANG , CHING-HUI LIN , CHUN-REN CHENG
Abstract: A method of manufacturing a semiconductor device includes: forming a first substrate includes a membrane stack over a first dielectric layer, the membrane stack having a first electrode, a second electrode over the first electrode and a piezoelectric layer between the first electrode and the second electrode, a third electrode over the first dielectric layer, and a second dielectric layer over the membrane stack and the third electrode; forming a second substrate, including: a redistribution layer (RDL) over a third substrate, the RDL having a fourth electrode; and a first cavity on a surface of the RDL adjacent to the fourth electrode; forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.
-
公开(公告)号：US20230320227A1
公开(公告)日：2023-10-05
申请号：US17707078
申请日：2022-03-29
Inventor： CHING-HUI LIN , FU-CHUN HUANG , CHUN-REN CHENG , WEI CHUN WANG , CHAO-HUNG CHU , YI-HSIEN CHANG , PO-CHEN YEH , CHI-YUAN SHIH , SHIH-FEN HUANG , YAN-JIE LIAO , SHENG KAI YEH
IPC: H01L41/047 , H01L41/083 , H01L41/27 , H01G5/18
CPC classification number: H01L41/0477 , H01G5/18 , H01L41/27 , H01L41/083
Abstract: A method for manufacturing a semiconductor structure is provided. The method may include several operations. A piezoelectric capacitor is formed over a substrate, wherein the piezoelectric capacitor includes a metal electrode. An intermediate layer is formed on the metal electrode, and is patterned using a first mask layer as a mask. A metal layer is formed on the intermediate layer, wherein the metal layer electrically connects to the metal electrode. The metal layer is patterned using a second mask layer, wherein the intermediate layer is within a coverage area of the metal layer from a top-view perspective after the patterning of the metal layer. A semiconductor structure thereof is also provided.
-
公开(公告)号：US20250145454A1
公开(公告)日：2025-05-08
申请号：US19011452
申请日：2025-01-06
Inventor： PO CHEN YEH , YI-HSIEN CHANG , FU-CHUN HUANG , CHING-HUI LIN , CHIAHUNG LIU , SHIH-FEN HUANG , CHUN-REN CHENG
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
-
公开(公告)号：US20230399225A1
公开(公告)日：2023-12-14
申请号：US17838023
申请日：2022-06-10
Inventor： PO CHEN YEH , YI-HSIEN CHANG , FU-CHUN HUANG , CHING-HUI LIN , CHIAHUNG LIU , SHIH-FEN HUANG , CHUN-REN CHENG
CPC classification number: B81B7/007 , B81C1/00301 , B81B2201/0271 , B81C2203/0792 , B81B2207/012 , B81B2207/07 , B81B2207/097 , B81B2203/0127
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
-
公开(公告)号：US20210078857A1
公开(公告)日：2021-03-18
申请号：US16573833
申请日：2019-09-17
Inventor： YI HENG TSAI , FU-CHUN HUANG , CHING-HUI LIN , CHUN-REN CHENG
Abstract: A hybrid ultrasonic transducer and a method of manufacturing the same are provided. A method of manufacturing a semiconductor device includes the forming of a first substrate and a second substrate. The forming of the first substrate includes: depositing a membrane stack over a first dielectric layer; forming a third electrode over the first dielectric layer; and depositing a second dielectric layer over the membrane stack and the third electrode. The forming of the second substrate includes: forming a redistribution layer (RDL) having a fourth electrode; and etching a first cavity on a surface of the RDL adjacent to the fourth electrode. The method further includes: forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.
-
-
-
-
-
Search Results
6
records
(took 0.015 seconds)
