DISPLAY PANEL
    2.
    发明公开
    DISPLAY PANEL 审中-公开

    公开(公告)号:US20240038190A1

    公开(公告)日:2024-02-01

    申请号:US17613118

    申请日:2021-10-22

    CPC classification number: G09G3/3614 H01L27/124 G02F1/136286 G09G2320/0209

    Abstract: A display panel is provided. The display panel includes a plurality of pixels, a first main data line, a first sub data line, and a first connecting line. The first main data line is electrically connected to pixels arranged in at least two columns. The first sub data line and the first main data line are separated by M columns of pixels, and the first sub data line is electrically connected to pixels arranged in at least two other columns. The first connecting line connects the first main data line and the first sub data line.

    PIXEL CIRCUIT AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20240265886A1

    公开(公告)日:2024-08-08

    申请号:US17621829

    申请日:2021-11-15

    CPC classification number: G09G3/3648 G09G2300/0426 G09G2320/0223

    Abstract: A pixel circuit of the present invention includes a thin-film transistor, a first scan line, a second scan line, and a data line. The first scan line is arranged along a first direction. The first scan line is electrically connected to the thin-film transistor. The second scan line is arranged along a second direction. The second scan line is electrically connected to the first scan line. The second direction is perpendicular to the first direction. The data line is arranged along the second direction. The data line is electrically connected to the thin-film transistor. The pixel circuit also includes an auxiliary scan line. The auxiliary scan line is arranged along the second direction. Two ends of the auxiliary scan line are electrically connected to the second scan line.

    DISPLAY PANEL
    5.
    发明公开
    DISPLAY PANEL 审中-公开

    公开(公告)号:US20240055418A1

    公开(公告)日:2024-02-15

    申请号:US17765588

    申请日:2022-03-30

    CPC classification number: H01L25/167 H01L27/124

    Abstract: A display panel is provided, including a power line, light-emitting lamp groups, partition channel wirings, driving chips, and a grounding signal wiring. The driving chips, the light-emitting lamp groups, and the partition channel wirings are disposed between the power line and the grouping signal wiring spaced apart. The driving chips are connected to the grounding signal wiring. The light-emitting lamp groups are connected to the power line. The partition channel wirings are connected to the light-emitting lamp groups. The power line, the grounding signal wiring, and the partition channel wirings are disposed in a same layer.

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