公开(公告)号：US11791351B2

公开(公告)日：2023-10-17

申请号：US17045186

申请日：2020-06-05

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Zhiwei Tan

IPC: H01L21/00 ,  H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L21/306 ,  H01L21/308 ,  H01L21/3213 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L21/3081 ,  H01L21/30604 ,  H01L21/32139 ,  H01L27/1225 ,  H01L29/7869

Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate. In the manufacturing method of the array substrate, during performing a first wet etching and a second wet etching on a second metal layer, the wet etching is stopped when a copper conductive layer is merely etched completely. Because a wet etching speed of a liner layer is slow, an etching time of the wet etching and a CD loss of the copper conductive layer can be greatly reduced, and the CD loss is relatively small. Meanwhile, an entire CD loss of the second metal layer can be reduced, and an aperture ratio can be improved.

公开(公告)号：US11841597B2

公开(公告)日：2023-12-12

申请号：US17051457

申请日：2020-05-20

Applicant: TCL China Star Optoelectronics Technology Co., Ltd.

Inventor： Zhixiong Jiang ,  Sheng Sun ,  Yoonsung Um ,  Woosung Son ,  Meng Chen ,  Wuguang Liu ,  Jubin Li ,  Zhiwei Tan ,  Haiyan Quan ,  Kaili Qu ,  Chuwei Liang ,  Ziqi Liu ,  Lintao Liu ,  Ting Li ,  Sikun Hao

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1335 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/133514 ,  G02F1/134309 ,  G02F1/136286 ,  H01L27/1222 ,  G02F1/13624

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

公开(公告)号：US12261575B1

公开(公告)日：2025-03-25

申请号：US18401542

申请日：2023-12-31

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Zhichao Zhou ,  Zhiwei Tan

IPC: G09G3/20 ,  H03F3/04

Abstract: The present application provides a signal amplifying circuit and a display device. In the signal amplifying circuit, a gate of a driving transistor of a first inverter is connected to an output terminal of a reset module, and thereby a potential of the gate of the driving transistor of the first inverter changes when an impedance of an optoelectronic device changes, so that a potential change of each node of the first inverter amplifies the signal. Besides, a first compensation transistor is connected between a second gate of the first driving transistor and a first output node, and the potential of the first output node precharges to the second gate of the first driving transistor to adjust a threshold voltage of the first driving transistor, thereby erasing the difference of the threshold voltages in different transistors, and solving the technical problem of bad uniformity of signals amplified by the inverter.