Method of fabricating integrated circuit arrays
    1.
    发明授权
    Method of fabricating integrated circuit arrays 失效
    制造集成电路阵列的方法

    公开(公告)号:US3641661A

    公开(公告)日:1972-02-15

    申请号:US3641661D

    申请日:1968-06-25

    Abstract: A large number of integrated circuits are formed on a semiconductor substrate. Conductive feedthrough connections are made through an insulating layer deposited over the integrated circuits and then the functional characteristics of the circuits are determined by testing at the feedthrough connections. Only the feedthrough connections connected to circuits having desirable functional characteristics are interconnected to provide the desired system function.

    Abstract translation: 在半导体衬底上形成大量的集成电路。 导电馈通连接通过沉积在集成电路上的绝缘层进行,然后通过在馈通连接处的测试来确定电路的功能特性。 只有连接到具有期望功能特性的电路的馈通连接被互连以提供期望的系统功能。

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