Method of fabricating integrated circuit arrays
    1.
    发明授权
    Method of fabricating integrated circuit arrays 失效
    制造集成电路阵列的方法

    公开(公告)号:US3641661A

    公开(公告)日:1972-02-15

    申请号:US3641661D

    申请日:1968-06-25

    Abstract: A large number of integrated circuits are formed on a semiconductor substrate. Conductive feedthrough connections are made through an insulating layer deposited over the integrated circuits and then the functional characteristics of the circuits are determined by testing at the feedthrough connections. Only the feedthrough connections connected to circuits having desirable functional characteristics are interconnected to provide the desired system function.

    Abstract translation: 在半导体衬底上形成大量的集成电路。 导电馈通连接通过沉积在集成电路上的绝缘层进行,然后通过在馈通连接处的测试来确定电路的功能特性。 只有连接到具有期望功能特性的电路的馈通连接被互连以提供期望的系统功能。

    Associative memory circuit
    2.
    发明授权
    Associative memory circuit 失效
    相关记忆电路

    公开(公告)号:US3634833A

    公开(公告)日:1972-01-11

    申请号:US3634833D

    申请日:1970-03-12

    CPC classification number: H03K3/35 G11C11/4116 G11C15/04 H03K3/288

    Abstract: An associative memory circuit suitable for integrated circuit fabrication, using multiemitter transistor logic techniques employs base-to-collector cross-coupled, bistable multivibrators to provide better memory cells with fewer components. In a circuit comprised of a plurality of memory cells, each cell includes means for addressing the cell, means for writing into it, means for reading out of it, and means for indicating whether the information stored therein is equal to other reference information, coupled to various emitters of the multiemitter transistors.

    Abstract translation: 适用于集成电路制造的关联存储器电路使用多发射晶体管逻辑技术采用基极到集电极交叉耦合的双稳态多谐振荡器,以更少的组件提供更好的存储单元。 在由多个存储单元组成的电路中,每个单元包括用于寻址单元的装置,用于写入单元的装置,用于读出单元的装置,用于读出单元的装置,以及用于指示其中存储的信息是否等于其他参考信息的装置, 涉及多发射晶体管的各种发射极。

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