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公开(公告)号:US20230378942A1
公开(公告)日:2023-11-23
申请号:US17749278
申请日:2022-05-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhishek Gupta , Sayantan Gupta
IPC: H03K3/3565
CPC classification number: H03K3/3565
Abstract: A circuit includes an inverter coupled between an input and an output. The inverter includes first and second pull-down transistors having control terminals coupled to the input, a pull-up resistor, and a pull-up transistor having a control terminal coupled to the input. The first and second pull-down transistors are coupled in series along a pull-down path extending between a first voltage supply terminal and the output. The pull-up resistor and pull-up transistor are coupled in series along a pull-up path extending between a second voltage supply terminal and the output. A hysteresis transistor has a control terminal coupled to the output. The hysteresis transistor is coupled to the inverter along a hysteresis path extending between the first voltage supply terminal and the pull-up path. A clamp circuit is coupled to the inverter along a clamp path extending between the first voltage supply terminal and the pull-down path.
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公开(公告)号:US11881859B2
公开(公告)日:2024-01-23
申请号:US17749278
申请日:2022-05-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhishek Gupta , Sayantan Gupta
IPC: H03K3/00 , H03K3/3565 , H03K3/2893
CPC classification number: H03K3/3565 , H03K3/2893
Abstract: A circuit includes an inverter coupled between an input and an output. The inverter includes first and second pull-down transistors having control terminals coupled to the input, a pull-up resistor, and a pull-up transistor having a control terminal coupled to the input. The first and second pull-down transistors are coupled in series along a pull-down path extending between a first voltage supply terminal and the output. The pull-up resistor and pull-up transistor are coupled in series along a pull-up path extending between a second voltage supply terminal and the output. A hysteresis transistor has a control terminal coupled to the output. The hysteresis transistor is coupled to the inverter along a hysteresis path extending between the first voltage supply terminal and the pull-up path. A clamp circuit is coupled to the inverter along a clamp path extending between the first voltage supply terminal and the pull-down path.
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