Architecture for VBUS pulsing in UDSM processes
    1.
    发明授权
    Architecture for VBUS pulsing in UDSM processes 有权
    在UDSM过程中VBUS脉冲的架构

    公开(公告)号:US09065430B2

    公开(公告)日:2015-06-23

    申请号:US14258771

    申请日:2014-04-22

    CPC classification number: H03K3/012 G06F1/26 H02J2007/0062 H03K19/0185

    Abstract: Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might include a diode-divider including nodes and connected from VBUS in said charging circuit. One embodiment uses both charging and discharging circuits comprising transistors. The charging circuit transistor might comprise a PMOS transistor and the discharging circuit transistor might comprise a NMOS transistor. The architecture might include a three resistance string of a total resistance value approximating 100K Ohms connected between said VBUS and ground, wherein the discharging circuit transistor might comprise a drain extended NMOS transistor. The charging and discharging circuit transistors have VDS and VGD of about 3.6V, whereby high VGS transistors are not needed.

    Abstract translation: 用于确保USB-OTG(On Go Go)会话请求协议的Ultra Deep Sub Micron(UDSM)过程中的VBUS脉冲的架构,该体系结构是至少部署充电电路的类型,其使用连接在 充电电路的前进路径。 该架构可以包括二极管分压器,其包括节点并且在所述充电电路中从VBUS连接。 一个实施例使用包括晶体管的充电和放电电路。 充电电路晶体管可以包括PMOS晶体管,并且放电电路晶体管可以包括NMOS晶体管。 该结构可以包括连接在所述VBUS和地之间的接近100K欧姆的总电阻值的三个电阻串,其中放电电路晶体管可以包括漏极延伸的NMOS晶体管。 充电和放电电路晶体管具有约3.6V的VDS和VGD,由此不需要高VGS晶体管。

    ARCHITECTURE FOR VBUS PULSING IN UDSM PROCESSES
    2.
    发明申请
    ARCHITECTURE FOR VBUS PULSING IN UDSM PROCESSES 审中-公开
    在UDSM过程中VBUS脉冲的结构

    公开(公告)号:US20140247071A1

    公开(公告)日:2014-09-04

    申请号:US14258771

    申请日:2014-04-22

    CPC classification number: H03K3/012 G06F1/26 H02J2007/0062 H03K19/0185

    Abstract: Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might include a diode-divider including nodes and connected from VBUS in said charging circuit. One embodiment uses both charging and discharging circuits comprising transistors. The charging circuit transistor might comprise a PMOS transistor and the discharging circuit transistor might comprise a NMOS transistor. The architecture might include a three resistance string of a total resistance value approximating 100K Ohms connected between said VBUS and ground, wherein the discharging circuit transistor might comprise a drain extended NMOS transistor. The charging and discharging circuit transistors have VDS and VGD of about 3.6V, whereby high VGS transistors are not needed.

    Abstract translation: 用于确保USB-OTG(On Go Go)会话请求协议的Ultra Deep Sub Micron(UDSM)过程中的VBUS脉冲的架构,该体系结构是至少部署充电电路的类型,其使用连接在 充电电路的前进路径。 该架构可以包括二极管分压器,其包括节点并且在所述充电电路中从VBUS连接。 一个实施例使用包括晶体管的充电和放电电路。 充电电路晶体管可以包括PMOS晶体管,并且放电电路晶体管可以包括NMOS晶体管。 该结构可以包括连接在所述VBUS和地之间的接近100K欧姆的总电阻值的三个电阻串,其中放电电路晶体管可以包括漏极延伸的NMOS晶体管。 充电和放电电路晶体管具有约3.6V的VDS和VGD,由此不需要高VGS晶体管。

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