OVERVOLTAGE PROTECTION CIRCUIT FOR USB INTERFACE
    2.
    发明申请
    OVERVOLTAGE PROTECTION CIRCUIT FOR USB INTERFACE 审中-公开
    用于USB接口的过电压保护电路

    公开(公告)号:US20160190794A1

    公开(公告)日:2016-06-30

    申请号:US14969026

    申请日:2015-12-15

    CPC classification number: H02H7/20 H02H9/045 H02H9/048

    Abstract: Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

    Abstract translation: 保护电路,USB接口集成电路和用于保护主机电路免受USB端口引脚过电压的影响,其中开关连接在USB端口引脚和中间节点之间,检测电路将中间节点电压与参考电压进行比较。 控制电路关闭开关并打开钳位电路,以响应于中间节点电压超过参考电压从中间节点传导下拉电流,以减轻耦合到中间节点的主机引脚上的过压状况。 当中间节点电压低于参考电压时,控制电路延迟预定时间,然后关断钳位电路并接通开关。

    Low area frequency compensation circuit and method

    公开(公告)号:US11971735B2

    公开(公告)日:2024-04-30

    申请号:US17083512

    申请日:2020-10-29

    CPC classification number: G05F1/575 H03F1/086 H03K5/00006

    Abstract: A compensation circuit comprising: a first source having an output; a second source having an output; a first transistor having a first current terminal coupled to the output of the first source, a second current terminal coupled to ground and a first control terminal connected to the first current terminal; a second transistor having a second control terminal, a third current terminal coupled to the output of the second source and a fourth current terminal coupled to ground; a first resistor connected between the first control terminal and the second control terminal; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor connected to the second control terminal.

    Controlled slew rate current limited ramp down voltage control

    公开(公告)号:US11616438B2

    公开(公告)日:2023-03-28

    申请号:US16724218

    申请日:2019-12-21

    Abstract: A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.

    Methods and apparatus for power switch fault protection

    公开(公告)号:US10312898B2

    公开(公告)日:2019-06-04

    申请号:US15206014

    申请日:2016-07-08

    Abstract: In described examples, a switch has: a first current handling terminal coupled to a supply source terminal; and a second current handling terminal coupled to an output terminal. A comparator has: a first input coupled to the second current handling terminal; and a second input. A voltage reference source has: a first terminal coupled to the first current handling terminal; and a second terminal coupled to the second input of the comparator. A slew rate detector has an input coupled to the second current handling terminal. A switch controller has: a first input coupled to the comparator output; and a second input coupled to an output of the slew rate detector. The switch controller is coupled to output a signal to cause the switch to open when the comparator detects an over-current condition through the switch while the slew rate detector detects a negative slew rate.

    Overvoltage protection circuit for USB interface

    公开(公告)号:US10148084B2

    公开(公告)日:2018-12-04

    申请号:US14969026

    申请日:2015-12-15

    Abstract: Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

    Fast Turn-On Power Switch
    8.
    发明申请

    公开(公告)号:US20170317583A1

    公开(公告)日:2017-11-02

    申请号:US15234722

    申请日:2016-08-11

    Abstract: In described examples, in response to a voltage at an external power terminal falling below a safe limit: a charge pump is operated at a first frequency to produce a voltage at a charge pump node; and a first controlled current is coupled from the charge pump node to a control terminal of a power switch transistor. The power switch transistor has a conduction path coupled between the external power terminal and an internal power terminal at which an internal power source is connected. In response to the voltage at the external power terminal reaching a selected level: the charge pump is operated at a second frequency, lower than the first frequency; and a second controlled current, lower than the first controlled current, is coupled from the charge pump node to the control terminal of the power switch transistor.

    CONTROLLED SLEW RATE CURRENT LIMITED RAMP DOWN VOLTAGE CONTROL

    公开(公告)号:US20210194362A1

    公开(公告)日:2021-06-24

    申请号:US16724218

    申请日:2019-12-21

    Abstract: A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.

    LOW AREA FREQUENCY COMPENSATION CIRCUIT AND METHOD

    公开(公告)号:US20210149427A1

    公开(公告)日:2021-05-20

    申请号:US17083512

    申请日:2020-10-29

    Abstract: A compensation circuit comprising: a first source having an output; a second source having an output; a first transistor having a first current terminal coupled to the output of the first source, a second current terminal coupled to ground and a first control terminal connected to the first current terminal; a second transistor having a second control terminal, a third current terminal coupled to the output of the second source and a fourth current terminal coupled to ground; a first resistor connected between the first control terminal and the second control terminal; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor connected to the second control terminal.

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