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公开(公告)号：US20210194362A1
公开(公告)日：2021-06-24
申请号：US16724218
申请日：2019-12-21
摘要： A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.
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2.发明授权公开(公告)号：US10770971B2
公开(公告)日：2020-09-08
申请号：US16428525
申请日：2019-05-31
发明人： Gary Franklin Chard , Ariel Dario Moctezuma , Hasibur Rahman , Alex Kwasi Nyavor Titriku , Srinath Hosur
摘要： A system includes an inductor and a first switch coupled between a first end of the inductor and a voltage supply node. The system also includes a second switch coupled between the first end of the inductor and a negative output supply node. The system also includes a third switch coupled between a second end of the inductor and a positive output supply node. The system also includes a fourth switch coupled between the second end of the inductor and a ground node. The system also includes a controller coupled to the first, second, third, and fourth switches. The controller is configured to provide an inductor charge mode, a positive boost mode, a negative boost mode, a first rest state involving the first switch, and a second rest state involving the fourth switch.
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公开(公告)号：US10079538B2
公开(公告)日：2018-09-18
申请号：US15296733
申请日：2016-10-18
发明人： Xiaochun Zhao , Hasibur Rahman , Artur Lewinski , Tulong Yang
CPC分类号： H02M3/07 , H02M3/1582 , H03K2217/0081
摘要： A circuit includes a charge pump to generate an output reference voltage. A first bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between first and second bootstrap nodes of a DC/DC converter. The first bootstrap refresh circuit supplies first charge current that is sourced from the first bootstrap node to the second bootstrap node based on a control signal indicating a first operating mode of the DC/DC converter. A second bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between the first and second bootstrap nodes of the DC/DC converter. The second bootstrap refresh circuit supplies second charge current from the second bootstrap node to the first bootstrap node based on the control signal indicating a second operating mode of the DC/DC converter.
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公开(公告)号：US20220385244A1
公开(公告)日：2022-12-01
申请号：US17880142
申请日：2022-08-03
发明人： Yang Xu , William Bright , Hasibur Rahman
IPC分类号： H03F3/04
摘要： A circuit having an input and an output, the circuit comprising: a first amplifier having a first input, a second input and an output coupled to the output of the circuit; a first capacitor having a first terminal coupled to the first input of the first amplifier and a second terminal coupled to the output of the first amplifier; a first resistor having a first terminal coupled to the first input of the first amplifier and a second terminal; a buffer having an output coupled to the second terminal of the first resistor and an input; a second resistor having a first terminal coupled to the output of the first amplifier and a second terminal coupled to the input of the buffer; a second capacitor coupled between the input of the buffer and ground; and a third resistor coupled between the input of the buffer and the input of the circuit.
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公开(公告)号：US20220200544A1
公开(公告)日：2022-06-23
申请号：US17124785
申请日：2020-12-17
发明人： Yang Xu , William Bright , Hasibur Rahman
IPC分类号： H03F3/04
摘要： A circuit having an input and an output, the circuit comprising: a first amplifier having a first input, a second input and an output coupled to the output of the circuit; a first capacitor having a first terminal coupled to the first input of the first amplifier and a second terminal coupled to the output of the first amplifier; a first resistor having a first terminal coupled to the first input of the first amplifier and a second terminal; a buffer having an output coupled to the second terminal of the first resistor and an input; a second resistor having a first terminal coupled to the output of the first amplifier and a second terminal coupled to the input of the buffer; a second capacitor coupled between the input of the buffer and ground; and a third resistor coupled between the input of the buffer and the input of the circuit.
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公开(公告)号：US10819234B2
公开(公告)日：2020-10-27
申请号：US16428588
申请日：2019-05-31
摘要： A system includes an inductor, and a first switch coupled between a first end of the inductor and a voltage supply node. The system also includes a second switch coupled between the first end of the inductor and a negative output supply node, wherein the second switch comprises a self-operated arrangement. The system also includes a third switch coupled between a second end of the inductor and a positive output supply node. The system also includes a fourth switch coupled between the second end of the inductor and a ground node. The system also includes a controller coupled to the first, second, third, and fourth switches.
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7.发明授权公开(公告)号：US11476761B2
公开(公告)日：2022-10-18
申请号：US17014863
申请日：2020-09-08
发明人： Gary Franklin Chard , Ariel Dario Moctezuma , Hasibur Rahman , Alex Kwasi Nyavor Titriku , Srinath Hosur
摘要： An inductor has first and second terminals. A first switch is coupled between the first terminal and a voltage supply terminal. A second switch is coupled between the first terminal and a negative output supply terminal. A third switch is coupled between the second terminal and a positive output supply terminal. A fourth switch is coupled between the second terminal and a ground terminal. A controller is coupled to the first, second, third and fourth switches. The controller is configured to provide: an inductor charge mode; a positive boost mode; a negative boost mode; a first rest state in which the controller closes the first switch and opens the second, third and fourth switches; and a second rest state in which the controller closes the fourth switch and opens the first, second and third switches.
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公开(公告)号：US11444587B2
公开(公告)日：2022-09-13
申请号：US17124785
申请日：2020-12-17
发明人： Yang Xu , William Bright , Hasibur Rahman
摘要： A circuit having an input and an output, the circuit comprising: a first amplifier having a first input, a second input and an output coupled to the output of the circuit; a first capacitor having a first terminal coupled to the first input of the first amplifier and a second terminal coupled to the output of the first amplifier; a first resistor having a first terminal coupled to the first input of the first amplifier and a second terminal; a buffer having an output coupled to the second terminal of the first resistor and an input; a second resistor having a first terminal coupled to the output of the first amplifier and a second terminal coupled to the input of the buffer; a second capacitor coupled between the input of the buffer and ground; and a third resistor coupled between the input of the buffer and the input of the circuit.
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公开(公告)号：US20140131781A1
公开(公告)日：2014-05-15
申请号：US14158948
申请日：2014-01-20
IPC分类号： H01L23/528 , H01L27/06
CPC分类号： H01L23/528 , H01L21/76816 , H01L21/76838 , H01L21/76843 , H01L23/485 , H01L23/5226 , H01L23/5256 , H01L23/5283 , H01L27/0629 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit contains lower components in the substrate, a PMD layer, upper components over the PMD layer, lower contacts in the PMD layer connecting some upper components to some lower components, an ILD layer over the upper components, metal interconnect lines over the ILD layer, and upper contacts connecting some upper components to some metal interconnect lines, and also includes annular stacked contacts of lower annular contacts aligned with upper annular contacts. The lower contacts and upper contacts each have a metal liner and a contact metal on the liner. The lower annular contacts have at least one ring of liner metal and contact metal surrounding a pillar of PMD material, and the upper contacts have at least one ring of liner metal and contact metal surrounding a pillar of ILD material. The annular stacked contacts connect the metal interconnects to the lower components.
摘要翻译： 集成电路在衬底中包含较低的组件，PMD层，PMD层上的上部组件，PMD层中的下部触点将一些上部组件连接到某些较低组件，上部组件上的ILD层，ILD上的金属互连线 层和上部触点，其将一些上部部件连接到某些金属互连线，并且还包括与上部环形触点对准的下部环形触点的环形堆叠触点。 下触点和上接触件都具有衬垫上的金属衬垫和接触金属。 下环形触头具有至少一个衬垫金属环和围绕PMD材料柱的接触金属，并且上触点具有至少一个衬垫金属环和围绕ILD材料柱的接触金属。 环形堆叠的触点将金属互连件连接到下部组件。
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公开(公告)号：US11616438B2
公开(公告)日：2023-03-28
申请号：US16724218
申请日：2019-12-21
摘要： A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.
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