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    Isolation of circuit elements using front side deep trench etch
    1.
    发明授权
    Isolation of circuit elements using front side deep trench etch 有权

    公开(公告)号：US11417725B2

    公开(公告)日：2022-08-16

    申请号：US17104478

    申请日：2020-11-25

    Applicant: Texas Instruments Incorporated

    Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

    IPC: H01L29/06 ,  H01L23/522 ,  H01L21/762 ,  H01L49/02 ,  H01L29/417 ,  H01L21/8234

    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

    ISOLATION OF CIRCUIT ELEMENTS USING FRONT SIDE DEEP TRENCH ETCH
    2.
    发明申请
    ISOLATION OF CIRCUIT ELEMENTS USING FRONT SIDE DEEP TRENCH ETCH 审中-公开

    公开(公告)号：US20190172907A1

    公开(公告)日：2019-06-06

    申请号：US16266677

    申请日：2019-02-04

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

    IPC: H01L29/06 ,  H01L21/762 ,  H01L23/522 ,  H01L49/02

    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

    Isolation of circuit elements using front side deep trench etch
    3.
    发明授权
    Isolation of circuit elements using front side deep trench etch 有权

    公开(公告)号：US10199461B2

    公开(公告)日：2019-02-05

    申请号：US14924584

    申请日：2015-10-27

    Applicant: Texas Instruments Incorporated

    Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

    IPC: H01L29/06 ,  H01L21/762 ,  H01L23/522 ,  H01L49/02 ,  H01L29/417 ,  H01L21/8234

    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

    WAFER SUBSTRATE REMOVAL
    6.
    发明申请
    WAFER SUBSTRATE REMOVAL 有权
    清除基板去除

    公开(公告)号：US20160218175A1

    公开(公告)日：2016-07-28

    申请号：US14701484

    申请日：2015-04-30

    Applicant: Texas Instruments Incorporated

    Inventor： Dan Carothers ,  Rajarshi Mukhopadhyay ,  Paul Brohlin ,  Benjamin Cook

    IPC: H01L29/06 ,  H01L23/528 ,  H01L21/683 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/78 ,  H01L23/522 ,  H01L21/762

    CPC classification number: H01L21/6835 ,  H01L21/02282 ,  H01L21/02288 ,  H01L21/31053 ,  H01L21/76224 ,  H01L21/78 ,  H01L21/823481 ,  H01L23/5223 ,  H01L23/528 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/13 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device is formed on a semiconductor substrate, including a primary portion of the substrate. An active component of the semiconductor device is disposed in the primary portion of the substrate. An interconnect region is formed on a top surface of the substrate. Semiconductor material is removed from the substrate in an isolation region, which is separate from the primary portion of the substrate; the isolation region extends from the top surface of the substrate to a bottom surface of the substrate. A dielectric replacement material is formed in the isolation region. The semiconductor device further includes an isolated component which is not disposed in the primary portion of the substrate. The dielectric replacement material in the isolation region separates the isolated component from the primary portion of the substrate.

    Abstract translation: 半导体器件形成在包括衬底的主要部分的半导体衬底上。 半导体器件的有源部件设置在基板的主要部分中。 在衬底的顶表面上形成互连区。 在与衬底的主要部分分离的隔离区域中从衬底去除半导体材料; 隔离区域从衬底的顶表面延伸到衬底的底表面。 电介质替代材料形成在隔离区域中。 半导体器件还包括未设置在基板的主要部分中的隔离部件。 隔离区域中的电介质替代材料将隔离的部件与基板的主要部分分离。

    ISOLATION OF CIRCUIT ELEMENTS USING FRONT SIDE DEEP TRENCH ETCH
    7.
    发明申请
    ISOLATION OF CIRCUIT ELEMENTS USING FRONT SIDE DEEP TRENCH ETCH 有权

    公开(公告)号：US20210083047A1

    公开(公告)日：2021-03-18

    申请号：US17104478

    申请日：2020-11-25

    Applicant: Texas Instruments Incorporated

    Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

    IPC: H01L29/06 ,  H01L23/522 ,  H01L21/762 ,  H01L49/02

    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

    Isolation of circuit elements using front side deep trench etch
    8.
    发明授权
    Isolation of circuit elements using front side deep trench etch 有权

    公开(公告)号：US10854712B2

    公开(公告)日：2020-12-01

    申请号：US16266677

    申请日：2019-02-04

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Dan Carothers ,  Ricky Jackson ,  Rajarshi Mukhopadhyay ,  Ben Cook

    IPC: H01L29/06 ,  H01L23/522 ,  H01L21/762 ,  H01L49/02 ,  H01L29/417 ,  H01L21/8234

    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.

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