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公开(公告)号:US10199461B2
公开(公告)日:2019-02-05
申请号:US14924584
申请日:2015-10-27
Applicant: Texas Instruments Incorporated
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L21/762 , H01L23/522 , H01L49/02 , H01L29/417 , H01L21/8234
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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公开(公告)号:US20170117356A1
公开(公告)日:2017-04-27
申请号:US14924584
申请日:2015-10-27
Applicant: Texas Instruments Incorporated
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L23/522 , H01L21/762
CPC classification number: H01L29/0649 , H01L21/762 , H01L21/76224 , H01L21/823481 , H01L23/5223 , H01L23/5226 , H01L28/00 , H01L28/40 , H01L29/4175 , H01L2224/48091 , H01L2224/4813 , H01L2224/48464 , H01L2924/00014
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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公开(公告)号:US20210067126A1
公开(公告)日:2021-03-04
申请号:US16553518
申请日:2019-08-28
Applicant: Texas Instruments Incorporated
Inventor: Nicholas S. Dellas , Brian Goodlin , Ricky Jackson
Abstract: A method for creating a double Bragg mirror is provided. The method comprises providing a wafer having a plurality of bulk acoustic wave (BAW) devices at an intermediate stage of manufacturing. A first dielectric layer is deposited over the wafer. A plurality of as-deposited thicknesses of the dielectric layer are determined, each as-deposited thickness corresponding to one BAW device from the plurality of BAW devices. A corresponding trimmed dielectric layer over each of the BAW devices is formed by removing a portion of the dielectric layer over each of the BAW devices, with a thickness of the removed portion determined from a corresponding as-deposited thickness and a target thickness. A Bragg acoustic reflector that includes the corresponding trimmed dielectric layer is formed over each of the BAW devices.
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公开(公告)号:US11417725B2
公开(公告)日:2022-08-16
申请号:US17104478
申请日:2020-11-25
Applicant: Texas Instruments Incorporated
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L23/522 , H01L21/762 , H01L49/02 , H01L29/417 , H01L21/8234
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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公开(公告)号:US20190172907A1
公开(公告)日:2019-06-06
申请号:US16266677
申请日:2019-02-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L21/762 , H01L23/522 , H01L49/02
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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公开(公告)号:US11146230B2
公开(公告)日:2021-10-12
申请号:US16553518
申请日:2019-08-28
Applicant: Texas Instruments Incorporated
Inventor: Nicholas S Dellas , Brian Goodlin , Ricky Jackson
Abstract: A method for creating a double Bragg mirror is provided. The method comprises providing a wafer having a plurality of bulk acoustic wave (BAW) devices at an intermediate stage of manufacturing. A first dielectric layer is deposited over the wafer. A plurality of as-deposited thicknesses of the dielectric layer are determined, each as-deposited thickness corresponding to one BAW device from the plurality of BAW devices. A corresponding trimmed dielectric layer over each of the BAW devices is formed by removing a portion of the dielectric layer over each of the BAW devices, with a thickness of the removed portion determined from a corresponding as-deposited thickness and a target thickness. A Bragg acoustic reflector that includes the corresponding trimmed dielectric layer is formed over each of the BAW devices.
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公开(公告)号:US20210083047A1
公开(公告)日:2021-03-18
申请号:US17104478
申请日:2020-11-25
Applicant: Texas Instruments Incorporated
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L23/522 , H01L21/762 , H01L49/02
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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公开(公告)号:US10854712B2
公开(公告)日:2020-12-01
申请号:US16266677
申请日:2019-02-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Dan Carothers , Ricky Jackson , Rajarshi Mukhopadhyay , Ben Cook
IPC: H01L29/06 , H01L23/522 , H01L21/762 , H01L49/02 , H01L29/417 , H01L21/8234
Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
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