公开(公告)号：US20240363340A1

公开(公告)日：2024-10-31

申请号：US18306759

申请日：2023-04-25

申请人： Tokyo Electron Limited

发明人： Charlotte Cutler ,  Michael Murphy ,  David Conklin

IPC分类号： H01L21/02

CPC分类号： H01L21/02348 ,  H01L21/02282 ,  H01L21/02334

摘要： A method of processing a substrate that includes: loading a substrate into a deposition tool, the substrate including a major working surface and a backside surface opposite the major working surface, the major working surface including a semiconductor device structure; in the deposition tool, performing a solution-based process to form a film on the backside surface, the film being an inorganic-based film or an organic-inorganic hybrid film.

公开(公告)号：US12119218B2

公开(公告)日：2024-10-15

申请号：US17310303

申请日：2020-01-28

申请人： Lam Research Corporation

发明人： Stephen M. Sirard ,  Ratchana Limary ,  Yang Pan ,  Diane Hymes

IPC分类号： H01L21/02 ,  H01L21/306 ,  H01L21/67

CPC分类号： H01L21/02118 ,  H01L21/02282 ,  H01L21/02307 ,  H01L21/02348 ,  H01L21/30625 ,  H01L21/6715

摘要： A method for protecting a surface of a substrate during processing includes a) providing a solution forming a co-polymer having a ceiling temperature; b) dispensing the solution onto a surface of the substrate to form a sacrificial protective layer, wherein the co-polymer is kinetically trapped to allow storage at a temperature above the ceiling temperature; c) exposing the substrate to ambient conditions for a predetermined period; and d) de-polymerizing the sacrificial protective layer by using stimuli selected from a group consisting of ultraviolet (UV) light and heat.

公开(公告)号：US12107004B2

公开(公告)日：2024-10-01

申请号：US18362797

申请日：2023-07-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhen Yu Guan ,  Hsun-Chung Kuang

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L23/532

CPC分类号： H01L21/76834 ,  H01L21/02282 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L21/0206 ,  H01L21/02074 ,  H01L21/7684 ,  H01L21/76843

摘要： A semiconductor structure including a self-assembled monolayer for enhancing metal-dielectric adhesion and preventing metal diffusion is provided. The semiconductor structure includes a substrate and a first dielectric layer on the substrate. A contact structure is embedded in the first dielectric layer and includes a conductive line. The semiconductor structure further includes a self-assembled monolayer on the conductive line, and a second dielectric layer on the first dielectric layer and the conductive line. The self-assembled monolayer is chemically bonded to the conductive line and the second dielectric layer.

公开(公告)号：US20240249972A1

公开(公告)日：2024-07-25

申请号：US18590747

申请日：2024-02-28

申请人： Intel Corporation

发明人： Ebony L. MAYS ,  Bruce J. TUFTS

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L29/06

CPC分类号： H01L21/76224 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02282 ,  H01L29/0649

摘要： Disclosed herein are methods for manufacturing IC components using bottom-up fill of openings with a dielectric material. In one aspect, an exemplary method includes, first, depositing a solid dielectric liner on the inner surfaces of the openings using a non-flowable process, and subsequently filling the remaining empty volume of the openings with a fill dielectric using a flowable process. Such a combination method may maximize the individual strengths of the non-flowable and flowable processes due to the synergetic effect achieved by their combined use, while reducing their respective drawbacks. Assemblies and devices manufactured using such methods are disclosed as well.

公开(公告)号：US11972948B2

公开(公告)日：2024-04-30

申请号：US16439377

申请日：2019-06-12

申请人： Brewer Science, Inc.

发明人： Andrea M. Chacko ,  Vandana Krishnamurthy ,  Yichen Liang ,  Hao Lee ,  Stephen Grannemann ,  Douglas J. Guerrero

IPC分类号： G03F7/00 ,  G03F1/24 ,  H01L21/02 ,  H01L21/027

CPC分类号： H01L21/0274 ,  G03F1/24 ,  G03F7/70033 ,  H01L21/02115 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02422

摘要： New lithographic compositions for use as EUV adhesion layers are provided. The present invention provides methods of fabricating microelectronics structures using those compositions as well as structures formed by those methods. The method involves utilizing an adhesion layer immediately below the photoresist layer. The adhesion layer can either be directly applied to the substrate, or it can be applied to any intermediate layer(s) that may be applied to the substrate, such as an alpha-carbon, spin-on carbon, spin-on silicon hardmask, metal hardmask, or deposited silicon layer. The preferred adhesion layers are formed from spin-coatable, polymeric compositions. The inventive method improves adhesion and reduces or eliminates pattern collapse issues.

公开(公告)号：US11965109B2

公开(公告)日：2024-04-23

申请号：US16929638

申请日：2020-07-15

申请人： MITSUI CHEMICALS, INC.

发明人： Yasuhisa Kayaba ,  Hirofumi Tanaka ,  Koji Inoue

IPC分类号： C09D177/06 ,  C08G69/42 ,  C08G73/02 ,  C08G73/10 ,  H01L21/02 ,  H01L21/3105 ,  H01L23/29 ,  C08K3/28 ,  C08K5/09 ,  C08K5/092

CPC分类号： C09D177/06 ,  C08G69/42 ,  C08G73/0293 ,  C08G73/1003 ,  H01L21/02118 ,  H01L21/02142 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/02343 ,  H01L21/3105 ,  H01L23/296 ,  C08K3/28 ,  C08K5/09 ,  C08K5/092

摘要： Provided is a composition for forming a film for semiconductor devices, including: a compound (A) including a Si—O bond and a cationic functional group containing at least one of a primary nitrogen atom or a secondary nitrogen atom; a crosslinking agent (B) which includes three or more —C(═O)OX groups (X is a hydrogen atom or an alkyl group having from 1 to 6 carbon atoms) in the molecule, in which from one to six of three or more —C(═O)OX groups are —C(═O)OH groups, and which has a weight average molecular weight of from 200 to 600; and a polar solvent (D).

公开(公告)号：US20240112906A1

公开(公告)日：2024-04-04

申请号：US18266110

申请日：2021-12-02

申请人： ABIT TECHNOLOGIES CO., LTD

发明人： Kiyokazu NAKAGAWA

IPC分类号： H01L21/02

CPC分类号： H01L21/02282 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/02252 ,  H01L21/02164

摘要： An object is to provide a manufacturing method of an insulation film in which no heating at high temperature is necessary. The manufacturing method of the insulation film includes a deposition process, a heating process and an exposure process. In the deposition process, a material is deposited on a substrate 11. In the heating process, the substrate 11 is heated at a temperature equal to or higher than 85° C. to equal to or lower than 450° C. In the exposure process, by irradiating a surface SA2 of a deposition material layer 12 on the substrate 11 with a plasma 82 containing hydrogen radicals, hydrogen is made to diffuse into the structure of the deposition material layer 12 and bind with components of the deposition material layer 12. A product of an irradiation time and a density of the radicals formed by the plasma 82 is equal to or higher than 25×1014 min·pcs/cm3.

公开(公告)号：US11915973B2

公开(公告)日：2024-02-27

申请号：US17115231

申请日：2020-12-08

申请人： Tokyo Electron Limited

发明人： Ainhoa Romo Negreira ,  Yumiko Kawana ,  Dina Triyoso

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/687

CPC分类号： H01L21/76834 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02301 ,  H01L21/02318 ,  H01L21/68764

摘要： A substrate processing method includes providing a substrate containing a metal surface and a dielectric material surface, selectively forming a sacrificial capping layer containing a self-assembled monolayer on the metal surface, removing the sacrificial capping layer to restore the metal surface, and processing the restored metal surface and the dielectric material surface. The sacrificial capping layer may be used to prevent metal diffusion into the dielectric material and to prevent oxidation and contamination of the metal surface while waiting for further processing of the substrate.

公开(公告)号：US20240055271A1

公开(公告)日：2024-02-15

申请号：US17602898

申请日：2021-07-22

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Rui DING

IPC分类号： H01L21/3213 ,  H01L21/02

CPC分类号： H01L21/3213 ,  H01L21/02282

摘要： A method of manufacturing a semiconductor test sample includes: providing a product to be analyzed, the product comprises a conductive interconnection layer and a semiconductor doped region located below the conductive interconnection layer; selectively removing a conductive material from the conductive interconnection layer, replacing the conductive material with a non-conductive material and replacing the conductive interconnection layer with an insulating sacrificial layer; and taking the product including both the insulating sacrificial layer and the semiconductor doped region as a semiconductor test sample.

公开(公告)号：US20230395699A1

公开(公告)日：2023-12-07

申请号：US18236056

申请日：2023-08-21

申请人： Micron Technology, Inc.

发明人： Masihhur R. Laskar ,  Jeffery B. Hull ,  Hung-Wei Liu

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H10B51/30

CPC分类号： H01L29/66553 ,  H01L29/78391 ,  H01L29/7827 ,  H01L29/66666 ,  H10B51/30 ,  H01L21/02345 ,  H01L29/6684 ,  H01L21/02164 ,  H01L21/02282

摘要： Integrated circuitry comprises an electronic component. Insulative silicon dioxide is adjacent the electronic component. The insulative silicon dioxide has at least one of (a) and (b), where: (a): an average concentration of elemental-form H of 0.002 to 0.5 atomic percent; and (b): an average concentration of elemental-form N of 0.005 to 0.3 atomic percent. Other embodiments, including method, are disclosed.