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公开(公告)号：US09893724B2
公开(公告)日：2018-02-13
申请号：US15180775
申请日：2016-06-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tri C. Nguyen , Md. Abidur Rahman , David J. Baldwin
IPC: H03K17/16 , H03K17/284 , H01L27/092 , H03K5/07 , H03K5/08 , H03K17/06
CPC classification number: H03K17/162 , H01L27/0928 , H03K5/07 , H03K5/08 , H03K17/163 , H03K17/284 , H03K2017/066
Abstract: A semiconductor device includes an output switching device having an input node, an output node, and a control input node. The control input node enables an input voltage applied to the input node to be switched to the output node. A gate pull-down circuit controls the control input node of the output switching device in response to at least one control signal. The gate pull-down circuit activates the output switching device by raising the voltage level of the control input node above the voltage level of the output node and deactivates the output switching device by clamping the control input node to the voltage level of the output node. A gate pull-up circuit receives an enable signal and generates the at least one control signal to the gate pull-down circuit in response to the enable signal.
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公开(公告)号：US09520822B2
公开(公告)日：2016-12-13
申请号：US13871191
申请日：2013-04-26
Applicant: Texas Instruments Incorporated
Inventor： David Hernandez , Mayank Garg , David J. Baldwin , Brandon James Beckham
CPC classification number: H02P25/032 , H02P6/182
Abstract: Circuits and methods for driving ERM motors are disclosed herein. An embodiment of the circuit includes an input, wherein an input signal is receivable at the input and a back EMF signal. The circuit operates in a closed loop mode when the back EMF signal is less than a lower threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase. The circuit operates in an open loop mode when the back EMF signal is greater than a high threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase.
Abstract translation: 本文公开了用于驱动ERM电动机的电路和方法。 电路的实施例包括输入，其中输入信号可在输入端接收，反馈EMF信号。 当反电动势信号小于下限阈值时，电路工作在闭环模式，而输入信号与反电动势信号之间的差异表示电动机的速度需要增加。 当反电动势信号大于高阈值时，电路工作在开环模式，输入信号和反电动势信号之间的差值表示电动机的速度需要增加。
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3.发明申请METHOD AND APPARATUS TO DRIVE A LINEAR RESONANT ACTUATOR AT ITS RESONANT FREQUENCY 审中-公开在谐振频率下驱动线性谐振致动器的方法和装置公开(公告)号：US20150280621A1
公开(公告)日：2015-10-01
申请号：US14733384
申请日：2015-06-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mayank Garg , David Hernandez , Brandon J. Beckham , David J. Baldwin , Brett E. Forejt
CPC classification number: H02P6/006 , G06F3/016 , G06F3/0416 , H02P6/182 , H02P7/00 , H02P7/025 , H02P25/02 , H02P25/032
Abstract: A method for driving a Linear Resonant Actuator (LRA) is provided. During a first off interval, the back-emf of the LRA is measured. During a first off interval, a timer is started when the back-emf reaches a predetermined threshold, and after a predetermined delay has lapsed following the back-emf reaching the predetermined threshold during the first off interval, the LRA is driven over a drive interval having a length and drive strength. A second off interval is entered following the drive interval, and during the second off interval, the back-emf of the LRA is measured. During the second off interval, the timer is stopped when the back-emf reaches the predetermined threshold. The value from the timer that corresponds to the duration between the back-emf reaching the predetermined threshold during the first off interval and the back-emf reaching the predetermined threshold during the second off interval determines the length.
Abstract translation: 提供了一种用于驱动线性谐振致动器（LRA）的方法。 在第一个关闭间隔期间，测量LRA的反电动势。 在第一关闭间隔期间，当反电动势达到预定阈值时，启动定时器，并且在第一关闭间隔期间在反电动势达到预定阈值之后经过预定延迟之后，LRA在驱动间隔 具有长度和驱动力。 在驱动间隔之后输入第二个关闭间隔，并且在第二个关闭间隔期间，测量LRA的反电动势。 在第二关闭间隔期间，当反电动势达到预定阈值时，定时器停止。 对应于在第一关闭间隔期间达到预定阈值的反电动势之间的持续时间的定时器的值和在第二关闭间隔期间达到预定阈值的反电动势确定长度。
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Patent Agency Ranking
公开(公告)号：US10366987B2
公开(公告)日：2019-07-30
申请号：US15211450
申请日：2016-07-15
Applicant: Texas Instruments Incorporated
Inventor： David J. Baldwin , Hector X. Roman , Md. Abidur Rahman
IPC: H01L27/088 , G01R19/00 , H03K17/08 , H03K17/14 , H01L29/78
Abstract: Described example embodiments include an integrated circuit having a first channel area with a first FET formed in a semiconductor substrate, the substrate providing a contact to the drain. A second channel area includes a second FET formed in the semiconductor substrate. A pilot FET couples to the first FET in a current mirror configuration. A third FET has a conductivity opposite the first and second FETs and couples to the source of the pilot FET. An op amp includes an output coupled to the gate of the third FET. Signals from the drain of the second FET and the source of the pilot FET couple to the inverting input of the op amp. Signals from the source of the first FET and the drain of the first FET couple to the non-inverting input of the op amp. Methods and additional apparatus are disclosed.
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公开(公告)号：US08618882B2
公开(公告)日：2013-12-31
申请号：US13730502
申请日：2012-12-28
Applicant: Texas Instruments Incorporated
Inventor： Brett Forejt , Jeff Berwick , David J. Baldwin
IPC: H03F3/45
CPC classification number: H03F3/45654 , H03F3/45179 , H03F2203/45528 , H03F2203/45562 , H03F2203/45594 , H03G1/0029 , H03G1/007
Abstract: An apparatus and method are provided. Generally, an input signal is applied across a main path (through an input network) and across a cancellation path (through a cancellation circuit). The cancellation circuit subtracts a cancellation current from the main path as part of the control mechanism, where the magnitude of the cancellation current is based on a gain control signal (that has been linearized to follow a control voltage).
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公开(公告)号：US20130113566A1
公开(公告)日：2013-05-09
申请号：US13730502
申请日：2012-12-28
Applicant: Texas Instruments Incorporated
Inventor： Brett Forejt , Jeff Berwick , David J. Baldwin
IPC: H03F3/45
CPC classification number: H03F3/45654 , H03F3/45179 , H03F2203/45528 , H03F2203/45562 , H03F2203/45594 , H03G1/0029 , H03G1/007
Abstract: An apparatus and method are provided. Generally, an input signal is applied across a main path (through an input network) and across a cancellation path (through a cancellation circuit). The cancellation circuit subtracts a cancellation current from the main path as part of the control mechanism, where the magnitude of the cancellation current is based on a gain control signal (that has been linearized to follow a control voltage).
Abstract translation: 提供了一种装置和方法。 通常，输入信号跨越主路径（通过输入网络）并跨越抵消路径（通过消除电路）施加。 消除电路从主路径减去作为控制机构的一部分的消除电流，其中消除电流的大小基于增益控制信号（已被线性化以跟随控制电压）。
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7.发明申请Methods and Apparatus for Compensation and Current Spreading Correction in Shared Drain Multi-Channel Load Switch 审中-公开在共享排水多通道负载开关中的补偿和电流扩展校正的方法和装置公开(公告)号：US20170030948A1
公开(公告)日：2017-02-02
申请号：US15211450
申请日：2016-07-15
Applicant: Texas Instruments Incorporated
Inventor： David J. Baldwin , Hector X. Roman , Md. Abidur Rahman
IPC: G01R19/10 , H01L29/417 , H01L27/088
CPC classification number: H01L27/088 , G01R19/0092 , H01L29/7802 , H03K17/08 , H03K17/145
Abstract: Described example embodiments include an integrated circuit having a first channel area with a first FET formed in a semiconductor substrate, the substrate providing a contact to the drain. A second channel area includes a second FET formed in the semiconductor substrate. A pilot FET couples to the first FET in a current mirror configuration. A third FET has a conductivity opposite the first and second FETs and couples to the source of the pilot FET. An op amp includes an output coupled to the gate of the third FET. Signals from the drain of the second FET and the source of the pilot FET couple to the inverting input of the op amp. Signals from the source of the first FET and the drain of the first FET couple to the non-inverting input of the op amp. Methods and additional apparatus are disclosed.
Abstract translation: 所描述的示例实施例包括具有形成在半导体衬底中的第一FET的第一沟道区的集成电路，该衬底提供与漏极的接触。 第二沟道区域包括形成在半导体衬底中的第二FET。 引导FET以电流镜配置耦合到第一FET。 第三FET具有与第一和第二FET相反的导电性并耦合到引导FET的源极。 运算放大器包括耦合到第三FET的栅极的输出。 来自第二FET的漏极和引导FET的源极的信号耦合到运算放大器的反相输入。 来自第一FET的源极和第一FET耦合的漏极到运算放大器的非反相输入端的信号。 公开了方法和附加装置。
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公开(公告)号：US20140320045A1
公开(公告)日：2014-10-30
申请号：US13871191
申请日：2013-04-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： David Hernandez , Mayank Garg , David J. Baldwin , Brandon James Beckham
IPC: H02P25/02
CPC classification number: H02P25/032 , H02P6/182
Abstract: Circuits and methods for driving ERM motors are disclosed herein. An embodiment of the circuit includes an input, wherein an input signal is receivable at the input and a back EMF signal. The circuit operates in a closed loop mode when the back EMF signal is less than a lower threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase. The circuit operates in an open loop mode when the back EMF signal is greater than a high threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase.
Abstract translation: 本文公开了用于驱动ERM电动机的电路和方法。 电路的实施例包括输入，其中输入信号可在输入端接收，反馈EMF信号。 当反电动势信号小于下限阈值时，电路工作在闭环模式，而输入信号与反电动势信号之间的差值表明电动机的速度需要增加。 当反电动势信号大于高阈值时，电路工作在开环模式，输入信号和反电动势信号之间的差值表示电动机的速度需要增加。
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