公开(公告)号：US20240078206A1

公开(公告)日：2024-03-07

申请号：US18502165

申请日：2023-11-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dheera BALASUBRAMANIAN ,  Joseph ZBICIAK ,  Sureshkumar GOVINDARAJ

IPC: G06F13/42 ,  G06F9/30 ,  G06F9/38 ,  G06F12/0875 ,  G06F15/76 ,  G06F15/78

CPC classification number: G06F13/42 ,  G06F9/30145 ,  G06F9/3802 ,  G06F12/0875 ,  G06F15/76 ,  G06F15/7807 ,  H04N19/423

Abstract: A multilayer butterfly network is shown that is operable to transform and align a plurality of fields from an input to an output data stream. Many transformations are possible with such a network which may include separate control of each multiplexer. This invention supports a limited set of multiplexer control signals, which enables a similarly limited set of data transformations. This limited capability is offset by the reduced complexity of the multiplexor control circuits. This invention used precalculated inputs and simple combinatorial logic to generate control signals for the butterfly network. Controls are independent for each layer and therefore are dependent only on the input and output patterns. Controls for the layers can be calculated in parallel.

公开(公告)号：US20220129403A1

公开(公告)日：2022-04-28

申请号：US17571612

申请日：2022-01-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dheera BALASUBRAMANIAN ,  Joseph ZBICIAK ,  Sureshkumar GOVINDARAJ

IPC: G06F13/42 ,  G06F9/30 ,  G06F9/38 ,  G06F15/78 ,  G06F12/0875 ,  G06F15/76

Abstract: A multilayer butterfly network is shown that is operable to transform and align a plurality of fields from an input to an output data stream. Many transformations are possible with such a network which may include separate control of each multiplexer. This invention supports a limited set of multiplexer control signals, which enables a similarly limited set of data transformations. This limited capability is offset by the reduced complexity of the multiplexor control circuits. This invention used precalculated inputs and simple combinatorial logic to generate control signals for the butterfly network. Controls are independent for each layer and therefore are dependent only on the input and output patterns. Controls for the layers can be calculated in parallel.

公开(公告)号：US20200050573A1

公开(公告)日：2020-02-13

申请号：US16545196

申请日：2019-08-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Dheera BALASUBRAMANIAN ,  Joseph ZBICIAK ,  Sureshkumar GOVINDARAJ

IPC: G06F13/42 ,  G06F12/0875 ,  G06F15/78 ,  G06F9/38 ,  G06F9/30 ,  G06F15/76

Abstract: A multilayer butterfly network is shown that is operable to transform and align a plurality of fields from an input to an output data stream. Many transformations are possible with such a network which may include separate control of each multiplexer. This invention supports a limited set of multiplexer control signals, which enables a similarly limited set of data transformations. This limited capability is offset by the reduced complexity of the multiplexor control circuits. This invention used precalculated inputs and simple combinatorial logic to generate control signals for the butterfly network. Controls are independent for each layer and therefore are dependent only on the input and output patterns. Controls for the layers can be calculated in parallel.

公开(公告)号：US20190205132A1

公开(公告)日：2019-07-04

申请号：US15940283

申请日：2018-03-29

Applicant: Texas Instruments Incorporated

Inventor： Duc BUI ,  Dheera BALASUBRAMANIAN ,  Naveen BHORIA ,  Sahithi KRISHNA

IPC: G06F9/30 ,  G06F17/30

Abstract: Disclosed embodiments relate to look up table operations implemented in a digital data processor. A look up table read instruction recalls data elements of a specified data size from table(s) and stores recalled data elements in successive slots in a destination register. Disclosed embodiments promote data elements to a larger size with selected sign or zero extension. A source operand register stores vector offsets from a table start address. A destination operand stores the results of the look up table read. The look up table instruction implies a base address register and a configuration register. The base address register stores a table base address. The configuration register sets various look up table read operation parameters.