INTEGRATED CIRCUIT WITH A GALVANICALLY-ISOLATED COMMUINCATION CHANNEL USING A BACK-SIDE ETCHED CHANNEL

    公开(公告)号:US20220406956A1

    公开(公告)日:2022-12-22

    申请号:US17680981

    申请日:2022-02-25

    Abstract: An integrated circuit (IC) includes a substrate having a first surface and a second surface opposite the first surface. The substrate has a first region containing a first circuit and a second region containing a second circuit. The first circuit operates at a first supply voltage. The second circuit operates at a second supply voltage. The second supply voltage is higher than the first supply voltage. The IC includes a through wafer trench (TWT) extending from the first surface of the substrate to the second surface of the semiconductor substrate. The TWT separates the first region from the second region. A dielectric material is in the TWT. An interconnect region has layers of dielectric on the first surface of the substrate. The interconnect region is continuous over the first region, the second region, and the TWT. A non-galvanic communication channel is between the first and second circuits.

    AVALANCHE PHOTODIODE GAIN CONTROL

    公开(公告)号:US20220037540A1

    公开(公告)日:2022-02-03

    申请号:US17347822

    申请日:2021-06-15

    Abstract: An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

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