公开(公告)号：US20220406649A1

公开(公告)日：2022-12-22

申请号：US17681029

申请日：2022-02-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Swaminathan SANKARAN ,  Scott Robert SUMMERFELT ,  Benjamin COOK

IPC: H01L21/762 ,  H01L21/768 ,  H01L21/02 ,  H01L27/01

Abstract: An integrated circuit (IC) includes a semiconductor substrate and an interconnect region. The semiconductor substrate has a first surface and a second surface opposite the first surface. The semiconductor substrate has a first region with a passive component. The semiconductor substrate has a second region outside the first region. The resistance of the second region is smaller than the resistance of the first region. The interconnection region is on the second surface of the semiconductor substrate.

公开(公告)号：US20220242722A1

公开(公告)日：2022-08-04

申请号：US17388301

申请日：2021-07-29

Applicant: Texas Instruments Incorporated

Inventor： Ting-Ta YEN ,  Jeronimo SEGOVIA-FERNANDEZ ,  Ricky Alan JACKSON ,  Benjamin COOK

IPC: B81B7/00

Abstract: A semiconductor system includes a substrate. The substrate has a front side and a back side. A device is formed on the front side of the substrate. A vertical spring is etched in the substrate about the device. A trench is etched in the front side of the substrate about the device. A wall of the trench forms a side of the vertical spring.

公开(公告)号：US20240391758A1

公开(公告)日：2024-11-28

申请号：US18794909

申请日：2024-08-05

Applicant: Texas Instruments Incorporated

Inventor： Ting-Ta YEN ,  Jeronimo SEGOVIA-FERNANDEZ ,  Ricky Alan JACKSON ,  Benjamin COOK

IPC: B81B7/00

Abstract: In one example, a method comprises etching a vertical spring in a substrate, the vertical spring encompassing a device formed on a front side of the substrate. The method further comprises bonding a cap to the front side of the substrate, the cap disposed over the device and the vertical spring.

公开(公告)号：US20220406956A1

公开(公告)日：2022-12-22

申请号：US17680981

申请日：2022-02-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Swaminathan SANKARAN ,  Baher HAROUN ,  Gerd SCHUPPENER ,  Scott Robert SUMMERFELT ,  Benjamin COOK

IPC: H01L31/173 ,  H01L49/02

Abstract: An integrated circuit (IC) includes a substrate having a first surface and a second surface opposite the first surface. The substrate has a first region containing a first circuit and a second region containing a second circuit. The first circuit operates at a first supply voltage. The second circuit operates at a second supply voltage. The second supply voltage is higher than the first supply voltage. The IC includes a through wafer trench (TWT) extending from the first surface of the substrate to the second surface of the semiconductor substrate. The TWT separates the first region from the second region. A dielectric material is in the TWT. An interconnect region has layers of dielectric on the first surface of the substrate. The interconnect region is continuous over the first region, the second region, and the TWT. A non-galvanic communication channel is between the first and second circuits.

公开(公告)号：US20240006466A1

公开(公告)日：2024-01-04

申请号：US17855346

申请日：2022-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bichoy BAHR ,  Swaminathan SANKARAN ,  Benjamin COOK ,  Baher S. HAROUN

IPC: H01L49/02 ,  H01F27/36 ,  H03B5/32

CPC classification number: H01L28/10 ,  H01F27/36 ,  H03B5/326

Abstract: An integrated circuit includes a semiconductor substrate, a metal layer, an inductor in the metal layer, and a shield above the inductor. The metal layer is a first metal layer; and the shield may be is in a second metal layer above the first metal layer. The shield may include a plurality of metal strips substantially perpendicular to metal lines of the inductor.

公开(公告)号：US20210214212A1

公开(公告)日：2021-07-15

申请号：US17135305

申请日：2020-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ting-Ta YEN ,  Jeronimo SEGOVIA-FERNANDEZ ,  Bichoy BAHR ,  Benjamin COOK

IPC: B81B3/00 ,  B81C1/00

Abstract: A device includes a substrate having first and second layers and an insulator layer between the first and second layers. A microelectromechanical system (MEMS) structure is provide on a portion of the second layer. A trench is formed in the second layer and around at least a part of a periphery of the portion of the second layer. An undercut is formed in the insulator layer and adjacent to the portion of the second layer. The undercut separates the portion of the second layer from the first layer. First and second pinholes extend from a plane of the insulator layer and in the first layer. The first and second pinholes are in fluid communication with the undercut and the trench.