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公开(公告)号：US11258407B2
公开(公告)日：2022-02-22
申请号：US16785725
申请日：2020-02-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karan Singh Bhatia
Abstract: An amplifier comprises a common emitter stage coupled to a first and a second input, a common base stage coupled to the common emitter stage and to a first and a second output, and a cancellation path coupled to the common emitter stage and the common base stage and to the first and second outputs. The cancellation path generates a first cancellation signal that is 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with a second leakage signal at the second output. The cancellation path comprises a first cancellation transistor coupled to the common emitter stage and the common base stage and to the first output and a second cancellation transistor coupled to the common emitter stage and the common base stage and to the second output.
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公开(公告)号：US09252663B2
公开(公告)日：2016-02-02
申请号：US14039661
申请日：2013-09-27
Applicant: Texas Instruments Incorporated
Inventor： Wei Fu , Karan Singh Bhatia , Siang Tong Tan
CPC classification number: H02M3/1563 , G05F1/575 , H02M3/158 , H02M2001/0032 , Y02B70/16
Abstract: An output voltage is compared to a reference voltage, comparison signals are generated, and control signals and mode signals are generated in response thereto. The output voltage is generated in response to the control signals. A speed of the comparing is increased in response to the mode signals indicating that the output voltage is being increased. The speed is reduced in response to the mode signals indicating that the output voltage is being reduced. For increasing the speed, a path is enabled to conduct current. While the path is enabled, at least one switched voltage is connected to vary an amount of the current conducted through the path. The switched voltage is at least one of the reference voltage and the output voltage. For reducing the speed, the path is disabled against conducting current. While the path is disabled, the switched voltage is disconnected from varying the amount.
Abstract translation: 将输出电压与参考电压进行比较，生成比较信号，响应于此产生控制信号和模式信号。 响应于控制信号产生输出电压。 响应于表示输出电压增加的模式信号，比较速度增加。 响应于表示输出电压正在减小的模式信号，速度降低。 为了提高速度，可以通过一个路径来传导电流。 当路径被使能时，连接至少一个开关电压以改变通过路径传导的电流量。 开关电压是参考电压和输出电压中的至少一个。 为了降低速度，路径禁止传导电流。 当路径被禁用时，切换的电压被断开以改变量。
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公开(公告)号：US12021552B2
公开(公告)日：2024-06-25
申请号：US17566047
申请日：2021-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karthik Subburaj , Pranav Sinha , Mayank Kumar Singh , Rittu Sachdev , Karan Singh Bhatia , Shailesh Joshi , Indu Prathapan
CPC classification number: H04B1/0075 , H04B1/04 , H04B1/1036 , H04B1/69 , H04B2001/0408 , H04B2001/1045 , H04B2001/1063 , H04B2001/6912
Abstract: A device comprises a digital ramp generator, an oscillator, a power amplifier, a low-noise amplifier (LNA), a mixer, and an intermediate frequency amplifier (IFA). The oscillator generates a chirp signal based on an output from the digital ramp generator. The power amplifier receives the chirp signal and outputs an amplified chirp signal to a transmitter antenna. The LNA receives a reflected chirp signal from a receiver antenna. The mixer receives output of the LNA and combines it with the chirp signal from the oscillator. The IFA receives the mixer output signal and includes a configurable high-pass filter, which has a first cutoff frequency during a first portion of the chirp signal and a second cutoff frequency during a second portion of the chirp signal. In some implementations, the first cutoff frequency is chosen based on a frequency of a blocker signal introduced by couplings between the transmitter and receiver antennas.
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公开(公告)号：US20150091538A1
公开(公告)日：2015-04-02
申请号：US14039661
申请日：2013-09-27
Applicant: Texas Instruments Incorporated
Inventor： Wei Fu , Karan Singh Bhatia , Siang Tong Tan
IPC: H02M3/158
CPC classification number: H02M3/1563 , G05F1/575 , H02M3/158 , H02M2001/0032 , Y02B70/16
Abstract: An output voltage is compared to a reference voltage, comparison signals are generated, and control signals and mode signals are generated in response thereto. The output voltage is generated in response to the control signals. A speed of the comparing is increased in response to the mode signals indicating that the output voltage is being increased. The speed is reduced in response to the mode signals indicating that the output voltage is being reduced. For increasing the speed, a path is enabled to conduct current. While the path is enabled, at least one switched voltage is connected to vary an amount of the current conducted through the path. The switched voltage is at least one of the reference voltage and the output voltage. For reducing the speed, the path is disabled against conducting current. While the path is disabled, the switched voltage is disconnected from varying the amount.
Abstract translation: 将输出电压与参考电压进行比较，生成比较信号，响应于此产生控制信号和模式信号。 响应于控制信号产生输出电压。 响应于表示输出电压增加的模式信号，比较速度增加。 响应于表示输出电压正在减小的模式信号，速度降低。 为了提高速度，可以通过一个路径来传导电流。 当路径被使能时，连接至少一个开关电压以改变通过路径传导的电流量。 开关电压是参考电压和输出电压中的至少一个。 为了降低速度，路径禁止传导电流。 当路径被禁用时，切换的电压被断开以改变量。
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