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公开(公告)号：US11283345B2
公开(公告)日：2022-03-22
申请号：US17228618
申请日：2021-04-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kishalay Datta , Vinod Menezes
Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
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公开(公告)号：US20230069663A1
公开(公告)日：2023-03-02
申请号：US17446132
申请日：2021-08-26
Applicant: Texas Instruments Incorporated
Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.
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Patent Agency Ranking
公开(公告)号：US11671138B2
公开(公告)日：2023-06-06
申请号：US17489483
申请日：2021-09-29
Applicant: Texas Instruments Incorporated
Inventor： RR Manikandan , Kumar Anurag Shrivastava , Robert Floyd Payne , Anant Shankar Kamath , Swaminathan Sankaran , Kishalay Datta , Siraj Akhtar , Mark Edward Wentroble , Suvadip Banerjee , Rakesh Hariharan , Gurumurti Kailaschandra Avhad
CPC classification number: H04B1/44 , H03K3/017 , H03K5/24 , H04L27/04 , H04L27/066
Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
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公开(公告)号：US20210234456A1
公开(公告)日：2021-07-29
申请号：US17228618
申请日：2021-04-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kishalay Datta , Vinod Menezes
IPC: H02M1/08 , G06F1/26 , G06F1/3296 , G06F1/30 , H02M3/00
Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
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公开(公告)号：US11809206B2
公开(公告)日：2023-11-07
申请号：US17446132
申请日：2021-08-26
Applicant: Texas Instruments Incorporated
CPC classification number: G05F1/56 , H03F1/0216 , H04B1/16 , H03F2200/102 , H03F2200/165
Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.
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公开(公告)号：US20230025757A1
公开(公告)日：2023-01-26
申请号：US17489483
申请日：2021-09-29
Applicant: Texas Instruments Incorporated
Inventor： RR Manikandan , Kumar Anurag Shrivastava , Robert Floyd Payne , Anant Shankar Kamath , Swaminathan Sankaran , Kishalay Datta , Siraj Akhtar , Mark Edward Wentroble , Suvadip Banerjee , Rakesh Hariharan , Gurumurti Kailaschandra Avhad
Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
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公开(公告)号：US10978944B2
公开(公告)日：2021-04-13
申请号：US16039644
申请日：2018-07-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kishalay Datta , Vinod Menezes
Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
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