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公开(公告)号：US20210119638A1
公开(公告)日：2021-04-22
申请号：US17112095
申请日：2020-12-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sovan GHOSH , Minkle Eldho PAUL , Laxmi Vivek TRIPURARI , Amal KUMAR KUNDU
Abstract: An analog-to-digital converter (ADC) circuit includes a signal input terminal, a sample-and-hold circuit, and a successive approximation register (SAR) ADC. The sample-and-hold circuit includes an input terminal coupled to the signal input terminal. The SAR ADC includes a comparator, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a first input terminal coupled to the signal input terminal, a second input terminal coupled to an output terminal of the sample-and-hold circuit, and an output terminal coupled to a first input terminal of the comparator. The second CDAC includes a first input terminal coupled to the signal input terminal, an output terminal coupled to a second input terminal of the comparator.
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公开(公告)号：US20200336118A1
公开(公告)日：2020-10-22
申请号：US16574231
申请日：2019-09-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sovan GHOSH , Amal KUMAR KUNDU , Laxmi Vivek TRIPURARI , Anand SUBRAMANIAN
Abstract: A circuit includes first and second gain stages and an output transistor. The second gain stage includes a transconductance amplifier and a variable impedance circuit coupled to an output of the transconductance amplifier. The variable impedance circuit is configured to implement a first impedance level at frequencies below a first frequency threshold and to implement a second impedance level at frequencies above a second frequency level. The first impedance level is larger than the second impedance level. The output transistor has a control input coupled to the variable impedance circuit. At frequencies above the second frequency threshold, the second impedance level is configured to be inversely related to current through the output transistor.
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公开(公告)号：US20210006211A1
公开(公告)日：2021-01-07
申请号：US17027093
申请日：2020-09-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sovan GHOSH , Amal KUMAR KUNDU , Laxmi Vivek TRIPURARI , Anand SUBRAMANIAN
Abstract: A circuit includes first and second gain stages and an output transistor. The second gain stage includes a transconductance amplifier and a variable impedance circuit coupled to an output of the transconductance amplifier. The variable impedance circuit is configured to implement a first impedance level at frequencies below a first frequency threshold and to implement a second impedance level at frequencies above a second frequency level. The first impedance level is larger than the second impedance level. The output transistor has a control input coupled to the variable impedance circuit. At frequencies above the second frequency threshold, the second impedance level is configured to be inversely related to current through the output transistor.
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公开(公告)号：US20250030391A1
公开(公告)日：2025-01-23
申请号：US18590280
申请日：2024-02-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Laxmi Vivek TRIPURARI , Anand SUBRAMANIAN , Tanmay HALDER , Anand KANNAN , Priyanshu PANDEY
Abstract: In some examples, a circuit includes a first transistor having a control terminal and first and second terminals. The circuit also includes a first capacitor having first and second terminals, the first terminal of the first capacitor coupled to the control terminal of the first transistor and the second terminal of the first capacitor coupled to the second terminal of the first transistor. The circuit also includes a first switch having first and second terminals, the second terminal of the first switch coupled to the control terminal of the first transistor. The circuit also includes a second capacitor having first and second terminals, the first terminal of the second capacitor coupled to the first terminal of the first transistor and the second terminal of the second capacitor coupled to the first terminal of the first switch.
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