公开(公告)号：US20210119638A1

公开(公告)日：2021-04-22

申请号：US17112095

申请日：2020-12-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan GHOSH ,  Minkle Eldho PAUL ,  Laxmi Vivek TRIPURARI ,  Amal KUMAR KUNDU

IPC: H03M1/46 ,  H03M1/12 ,  H03M1/10

Abstract: An analog-to-digital converter (ADC) circuit includes a signal input terminal, a sample-and-hold circuit, and a successive approximation register (SAR) ADC. The sample-and-hold circuit includes an input terminal coupled to the signal input terminal. The SAR ADC includes a comparator, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a first input terminal coupled to the signal input terminal, a second input terminal coupled to an output terminal of the sample-and-hold circuit, and an output terminal coupled to a first input terminal of the comparator. The second CDAC includes a first input terminal coupled to the signal input terminal, an output terminal coupled to a second input terminal of the comparator.

公开(公告)号：US20200336118A1

公开(公告)日：2020-10-22

申请号：US16574231

申请日：2019-09-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan GHOSH ,  Amal KUMAR KUNDU ,  Laxmi Vivek TRIPURARI ,  Anand SUBRAMANIAN

IPC: H03F1/56 ,  H04R3/00 ,  H04R3/04

Abstract: A circuit includes first and second gain stages and an output transistor. The second gain stage includes a transconductance amplifier and a variable impedance circuit coupled to an output of the transconductance amplifier. The variable impedance circuit is configured to implement a first impedance level at frequencies below a first frequency threshold and to implement a second impedance level at frequencies above a second frequency level. The first impedance level is larger than the second impedance level. The output transistor has a control input coupled to the variable impedance circuit. At frequencies above the second frequency threshold, the second impedance level is configured to be inversely related to current through the output transistor.

公开(公告)号：US20190386670A1

公开(公告)日：2019-12-19

申请号：US16555265

申请日：2019-08-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan GHOSH ,  Amal Kumar KUNDU ,  Janakiraman SEETHARAMAN

IPC: H03M1/08 ,  H03K5/24

Abstract: A comparator circuit includes a first transistor configured to receive a first input and a second transistor configured to receive a second input. The comparator circuit further includes a third transistor coupled to a terminal of each of the first and second transistors. The third transistor is configured to be controlled by a first control signal. A gate of a fifth transistor is coupled to a terminal of a fourth transistor at a first node and a gate of the fourth transistor is coupled to a terminal of the fifth transistor at a second node. A sixth transistor is coupled between the first and fourth transistors. A seventh transistor is coupled between the second and fifth transistors. A gate of the sixth transistor and a gate of the seventh transistor are coupled together at a fixed voltage level.

公开(公告)号：US20250023594A1

公开(公告)日：2025-01-16

申请号：US18397868

申请日：2023-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Visvesvaraya A. PENTAKOTA ,  Sovan GHOSH

IPC: H04B1/16

Abstract: One example includes an analog-to-digital converter (ADC) front-end system. The system includes a digital step attenuator (DSA) having an input and an output. The system also includes a sampling system having an input coupled to the output of the DSA. The sampling system includes a first sampling capacitor, a second sampling capacitor, and at least one sampling switch. The sampling system can be configured to sample an analog signal current provided from the DSA on the first sampling capacitor and the second sampling capacitor concurrently in response to activation of the at least one sampling switch to integrate the analog signal current as a sampling voltage on both the first and second sampling capacitors. The system further includes an ADC having an input and an output, the input of the ADC coupled to the output of the sampling system.

公开(公告)号：US20250007528A1

公开(公告)日：2025-01-02

申请号：US18394031

申请日：2023-12-22

Applicant: Texas Instruments Incorporated

Inventor： Sovan GHOSH ,  Visvesvaraya Appala PENTAKOTA

IPC: H03M1/06

Abstract: A circuit includes an amplifier, a pre-driver circuit, and an output circuit. The amplifier has a first input, a second input, and an output. The pre-driver circuit has an input coupled to the output of the amplifier, a first output, a second output, and a third output coupled to the second input of the amplifier. The output circuit includes a first transistor and a second transistor. The first transistor has a control terminal coupled to the first output of the pre-driver circuit; a first terminal, and a second terminal coupled to the third output of the pre-driver circuit. The second transistor has a control terminal coupled to the second output of the pre-driver circuit, a first terminal coupled to the second terminal of the first transistor, and a second terminal coupled to a reference terminal.

公开(公告)号：US20210006211A1

公开(公告)日：2021-01-07

申请号：US17027093

申请日：2020-09-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan GHOSH ,  Amal KUMAR KUNDU ,  Laxmi Vivek TRIPURARI ,  Anand SUBRAMANIAN

IPC: H03F1/56 ,  H04R3/04 ,  H04R3/00

Abstract: A circuit includes first and second gain stages and an output transistor. The second gain stage includes a transconductance amplifier and a variable impedance circuit coupled to an output of the transconductance amplifier. The variable impedance circuit is configured to implement a first impedance level at frequencies below a first frequency threshold and to implement a second impedance level at frequencies above a second frequency level. The first impedance level is larger than the second impedance level. The output transistor has a control input coupled to the variable impedance circuit. At frequencies above the second frequency threshold, the second impedance level is configured to be inversely related to current through the output transistor.