SURROUND VIEW
    2.
    发明申请

    公开(公告)号:US20220335680A1

    公开(公告)日:2022-10-20

    申请号:US17853220

    申请日:2022-06-29

    Abstract: A system on a chip (SoC) includes a digital signal processor (DSP) and a graphics processing unit (GPU) coupled to the DSP. The DSP is configured to receive a stream of received depth measurements and generate a virtual bowl surface based on the stream of received depth measurements. The DSP is also configured to generate a bowl to physical camera mapping based on the virtual bowl surface. The GPU is configured to receive a first texture and receive a second texture. The GPU is also configured to perform physical camera to virtual camera transformation on the first texture and on the second texture, based on the bowl to physical camera mapping, to generate an output image.

    SURROUND VIEW
    3.
    发明申请

    公开(公告)号:US20210027522A1

    公开(公告)日:2021-01-28

    申请号:US16519099

    申请日:2019-07-23

    Abstract: A system on a chip (SoC) includes a digital signal processor (DSP) and a graphics processing unit (GPU) coupled to the DSP. The DSP is configured to receive a stream of received depth measurements and generate a virtual bowl surface based on the stream of received depth measurements. The DSP is also configured to generate a bowl to physical camera mapping based on the virtual bowl surface. The GPU is configured to receive a first texture and receive a second texture. The GPU is also configured to perform physical camera to virtual camera transformation on the first texture and on the second texture, based on the bowl to physical camera mapping, to generate an output image.

    PIPELINE SETTING SELECTION FOR GRAPH-BASED APPLICATIONS

    公开(公告)号:US20220237137A1

    公开(公告)日:2022-07-28

    申请号:US17582992

    申请日:2022-01-24

    Abstract: An example system includes a pipeline depth determination circuit and a buffer depth determination circuit. The pipeline depth determination circuit is configured to analyze input-output connections between a plurality of processing nodes specified to perform a processing task, and determine a pipeline depth of the processing task based on the input-output connections. The buffer depth determination circuit is configured to analyze the input-output connections between the plurality of processing nodes, and assign, based on the input-output connections, a depth value to each of a plurality of buffer memories configured to store output of a first of the processing nodes for input to a second of the processing nodes.

    Surround view
    5.
    发明授权

    公开(公告)号:US11380046B2

    公开(公告)日:2022-07-05

    申请号:US16519099

    申请日:2019-07-23

    Abstract: A system on a chip (SoC) includes a digital signal processor (DSP) and a graphics processing unit (GPU) coupled to the DSP. The DSP is configured to receive a stream of received depth measurements and generate a virtual bowl surface based on the stream of received depth measurements. The DSP is also configured to generate a bowl to physical camera mapping based on the virtual bowl surface. The GPU is configured to receive a first texture and receive a second texture. The GPU is also configured to perform physical camera to virtual camera transformation on the first texture and on the second texture, based on the bowl to physical camera mapping, to generate an output image.

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