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公开(公告)号:US20210134750A1
公开(公告)日:2021-05-06
申请号:US16669070
申请日:2019-10-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Christopher Daniel MANACK , Salvatore Frank PAVONE , Maricel Fabia ESCAÑO , Rafael Jose Lizares GUEVARA
IPC: H01L23/00
Abstract: In examples, a semiconductor package comprises a semiconductor die having an active surface; a conductive layer coupled to the active surface; and a polyimide layer coupled to the conductive layer. The package also comprises a conductive pillar coupled to the conductive layer and to the polyimide layer; a flux adhesive material coupled to the conductive pillar; and a solder layer coupled to the flux adhesive material. The package further includes a conductive terminal coupled to the solder layer and exposed to a surface of the package, the active surface of the semiconductor die facing the conductive terminal.
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公开(公告)号:US20240234282A1
公开(公告)日:2024-07-11
申请号:US18617499
申请日:2024-03-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jeffrey Salvacion SOLAS , Maricel Fabia ESCAÑO
IPC: H01L23/498 , H01L21/768 , H01L23/48
CPC classification number: H01L23/49827 , H01L21/76877 , H01L21/76898 , H01L23/481
Abstract: In some examples a method comprises forming an insulating member over a circuit on a device side of a semiconductor die, removing a portion of the insulating member to produce a cavity, and forming a seed layer on the insulating member and within the cavity. In addition, the method includes forming a conductive member on the seed layer in the cavity, wherein the conductive member comprises a plurality of layers of different metal materials. Further, the method includes removing the seed layer from atop the insulating member, outside the cavity, after forming the conductive member in the cavity such that a remaining portion of the seed layer is positioned between the conductive member and the insulating member.
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公开(公告)号:US20230068086A1
公开(公告)日:2023-03-02
申请号:US17463077
申请日:2021-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jeffrey Salvacion SOLAS , Maricel Fabia ESCAÑO
IPC: H01L23/498 , H01L21/768 , H01L23/48
Abstract: In some examples a method comprises forming an insulating member over a circuit on a device side of a semiconductor die, removing a portion of the insulating member to produce a cavity, and forming a seed layer on the insulating member and within the cavity. In addition, the method includes forming a conductive member on the seed layer in the cavity, wherein the conductive member comprises a plurality of layers of different metal materials. Further, the method includes removing the seed layer from atop the insulating member, outside the cavity, after forming the conductive member in the cavity such that a remaining portion of the seed layer is positioned between the conductive member and the insulating member.
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公开(公告)号:US20250006573A1
公开(公告)日:2025-01-02
申请号:US18345186
申请日:2023-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
IPC: H01L23/16 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/495
Abstract: In examples, a semiconductor package comprises a semiconductor die including a device side having circuitry formed therein. The device side includes a sensor. The package includes a metal member creating a hollow cavity extending through the metal member, the hollow cavity vertically aligned with the sensor, the metal member including a lower portion having a first wall thickness and an upper portion having varying wall thicknesses greater than and less than the first wall thickness, an intersection of the upper and lower portions forming a notch on an outer side of the metal member opposing the hollow cavity. The package also includes a mold compound covering portions of the semiconductor die and contacting the metal member.
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公开(公告)号:US20240413114A1
公开(公告)日:2024-12-12
申请号:US18810928
申请日:2024-08-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Christopher Daniel MANACK , Salvatore Frank PAVONE , Maricel Fabia ESCAÑO , Rafael Jose Lizares GUEVARA
IPC: H01L23/00
Abstract: In examples, a semiconductor package comprises a semiconductor die having an active surface; a conductive layer coupled to the active surface; and a polyimide layer coupled to the conductive layer. The package also comprises a conductive pillar coupled to the conductive layer and to the polyimide layer; a flux adhesive material coupled to the conductive pillar; and a solder layer coupled to the flux adhesive material. The package further includes a conductive terminal coupled to the solder layer and exposed to a surface of the package, the active surface of the semiconductor die facing the conductive terminal.
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