公开(公告)号：US10886933B1

公开(公告)日：2021-01-05

申请号：US16656913

申请日：2019-10-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan Ghosh ,  Minkle Eldho Paul ,  Laxmi Vivek Tripurari ,  Amal Kumar Kundu

IPC: H03M1/12 ,  H03M1/46 ,  H03M1/10 ,  H03M1/06 ,  G11C27/02 ,  H03M1/00

Abstract: An analog-to-digital converter (ADC) circuit includes a signal input terminal, a sample-and-hold circuit, and a successive approximation register (SAR) ADC. The sample-and-hold circuit includes an input terminal coupled to the signal input terminal. The SAR ADC includes a comparator, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a first input terminal coupled to the signal input terminal, a second input terminal coupled to an output terminal of the sample-and-hold circuit, and an output terminal coupled to a first input terminal of the comparator. The second CDAC includes a first input terminal coupled to the signal input terminal, an output terminal coupled to a second input terminal of the comparator.

公开(公告)号：US11206035B2

公开(公告)日：2021-12-21

申请号：US16702090

申请日：2019-12-03

Applicant: Texas Instruments Incorporated

Inventor： Rahul Vijay Kulkarni ,  Shridhar More ,  Amal Kumar Kundu ,  Minkle Eldho Paul

IPC: H03M1/10 ,  H03M1/12 ,  H03M1/46

Abstract: An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.

公开(公告)号：US10833690B2

公开(公告)日：2020-11-10

申请号：US16654062

申请日：2019-10-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yujendra Mitikiri ,  Minkle Eldho Paul ,  Anukruti Chakraborty

IPC: H03M1/06 ,  H03M1/08 ,  H03M1/46 ,  H03M1/00 ,  H03M1/12

Abstract: An analog-to-digital converter (ADC) includes a comparator, a voltage reference circuit, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a plurality of capacitors. Each of the capacitors of the first CDAC includes a top plate coupled to a first input of the comparator, and a bottom plate switchably coupled to an output of the voltage reference circuit. The second CDAC includes a plurality of capacitors. Each of the capacitors of the second CDAC includes a top plate coupled to a second input of the comparator, and a bottom plate switchably coupled to a ground reference.

公开(公告)号：US20200295773A1

公开(公告)日：2020-09-17

申请号：US16702090

申请日：2019-12-03

Applicant: Texas Instruments Incorporated

Inventor： Rahul Vijay Kulkarni ,  Shridhar More ,  Amal Kumar Kundu ,  Minkle Eldho Paul

IPC: H03M1/10

Abstract: An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.

公开(公告)号：US11349492B2

公开(公告)日：2022-05-31

申请号：US17112095

申请日：2020-12-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sovan Ghosh ,  Minkle Eldho Paul ,  Laxmi Vivek Tripurari ,  Amal Kumar Kundu

IPC: H03M1/12 ,  H03M1/46 ,  H03M1/10 ,  H03M1/06 ,  G11C27/02 ,  H03M1/00

Abstract: An analog-to-digital converter (ADC) circuit includes a signal input terminal, a sample-and-hold circuit, and a successive approximation register (SAR) ADC. The sample-and-hold circuit includes an input terminal coupled to the signal input terminal. The SAR ADC includes a comparator, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a first input terminal coupled to the signal input terminal, a second input terminal coupled to an output terminal of the sample-and-hold circuit, and an output terminal coupled to a first input terminal of the comparator. The second CDAC includes a first input terminal coupled to the signal input terminal, an output terminal coupled to a second input terminal of the comparator.

公开(公告)号：US11258452B2

公开(公告)日：2022-02-22

申请号：US17039313

申请日：2020-09-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yujendra Mitikiri ,  Minkle Eldho Paul ,  Anukruti Chakraborty

IPC: H03M1/06 ,  H03M1/08 ,  H03M1/46 ,  H03M1/00 ,  H03M1/12

Abstract: An analog-to-digital converter (ADC) includes a comparator, a voltage reference circuit, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a plurality of capacitors. Each of the capacitors of the first CDAC includes a top plate coupled to a first input of the comparator, and a bottom plate switchably coupled to an output of the voltage reference circuit. The second CDAC includes a plurality of capacitors. Each of the capacitors of the second CDAC includes a top plate coupled to a second input of the comparator, and a bottom plate switchably coupled to a ground reference.

公开(公告)号：US10483994B2

公开(公告)日：2019-11-19

申请号：US15902092

申请日：2018-02-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yujendra Mitikiri ,  Minkle Eldho Paul ,  Anukruti Chakraborty

IPC: H03M1/06 ,  H03M1/08 ,  H03M1/00 ,  H03M1/12

Abstract: An analog-to-digital converter (ADC) includes a comparator, a voltage reference circuit, a first capacitive digital-to-analog converter (CDAC), and a second CDAC. The first CDAC includes a plurality of capacitors. Each of the capacitors of the first CDAC includes a top plate coupled to a first input of the comparator, and a bottom plate switchably coupled to an output of the voltage reference circuit. The second CDAC includes a plurality of capacitors. Each of the capacitors of the second CDAC includes a top plate coupled to a second input of the comparator, and a bottom plate switchably coupled to a ground reference.