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公开(公告)号：US10084307B2
公开(公告)日：2018-09-25
申请号：US15141365
申请日：2016-04-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Pradeep V S R Pydah , Biranchinath Sahu , Tetsuo Tateishi , Kuang-Yao Cheng , Nandakishore Raimar
CPC classification number: H02H7/1213 , G06F1/26 , G06F1/28 , G06F1/305 , H02H3/087
Abstract: The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.
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公开(公告)号：US09817414B2
公开(公告)日：2017-11-14
申请号：US14685590
申请日：2015-04-13
Applicant: Texas Instruments Incorporated
Inventor： Naga Venkata Prasadu Mangina , Biranchinath Sahu , Pradeep V S R Pydah , Nandakishore Raimar
Abstract: Undershoot reduction circuitry includes, for example, a first comparator, a second comparator, and a controller. The first comparator is operable for comparing an indication of a power supply voltage output against a first threshold. The second comparator is operable for comparing an indication of the power supply voltage output against a second threshold. The controller is operable for generating a first power control signal to raise the power supply voltage output when the indication of the power supply voltage output has a first slope and crosses the first threshold and to lower the power supply voltage output when the indication of the power supply voltage output has an opposite slope and crosses the second threshold.
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