公开(公告)号：US09325233B2

公开(公告)日：2016-04-26

申请号：US14320747

申请日：2014-07-01

Applicant: Texas Instruments Incorporated

Inventor： Paul Thomas Bennett ,  Robert Henry Bell ,  Sang Yong Lee ,  Robert Kenneth Oppen ,  Jiandong Jiang

IPC: H02M3/158 ,  H02M1/00

CPC classification number: H02M1/00 ,  H02M3/156 ,  H02M3/158 ,  H02M2001/0003 ,  H02M2001/0025

Abstract: DC to DC converters and PWM controllers are presented in which a slope compensation ramp signal is provided for current control operation via a frequency adaptive compensation circuit with a phase locked loop that provides a control output signal having an amplitude generally proportional to the frequency of a clock signal, and a slope generator circuit generating the slope compensation ramp signal with an amplitude generally proportional to the control output signal amplitude.

Abstract translation: 提供DC到DC转换器和PWM控制器，其中通过具有锁相环的频率自适应补偿电路提供斜率补偿斜坡信号用于电流控制操作，该锁相环提供具有与时钟频率成正比的幅度的控制输出信号 信号和斜率发生器电路，其产生具有与控制输出信号幅度成正比的幅度的斜坡补偿斜坡信号。

公开(公告)号：US20160006336A1

公开(公告)日：2016-01-07

申请号：US14320747

申请日：2014-07-01

Applicant: Texas Instruments Incorporated

Inventor： Paul Thomas Bennett ,  Robert Henry Bell ,  Sang Yong Lee ,  Robert Kenneth Oppen ,  Jiandong Jiang

IPC: H02M1/00 ,  H02M3/158

CPC classification number: H02M1/00 ,  H02M3/156 ,  H02M3/158 ,  H02M2001/0003 ,  H02M2001/0025

Abstract: DC to DC converters and PWM controllers are presented in which a slope compensation ramp signal is provided for current control operation via a frequency adaptive compensation circuit with a phase locked loop that provides a control output signal having an amplitude generally proportional to the frequency of a clock signal, and a slope generator circuit generating the slope compensation ramp signal with an amplitude generally proportional to the control output signal amplitude.

Abstract translation: 提供DC到DC转换器和PWM控制器，其中通过具有锁相环的频率自适应补偿电路提供斜率补偿斜坡信号用于电流控制操作，该锁相环提供具有与时钟频率成正比的幅度的控制输出信号 信号和斜率发生器电路，其产生具有与控制输出信号幅度成正比的幅度的斜坡补偿斜坡信号。

公开(公告)号：US11984876B2

公开(公告)日：2024-05-14

申请号：US17732986

申请日：2022-04-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Robert Allan Neidorff ,  Robert Kenneth Oppen

IPC: H03K17/0812 ,  G01K7/00 ,  G01R19/10 ,  H03K17/08

CPC classification number: H03K17/0812 ,  G01K7/00 ,  G01R19/10 ,  H03K2017/0806

Abstract: In at least one example, an apparatus includes a logic circuit having a switch control output and first and second logic circuit inputs. A pulse generator has a generator output coupled to the first logic circuit input. An elevated temperature detector has a detector output and a temperature sensor. The detector output is coupled between the second logic circuit input and the temperature sensor.

公开(公告)号：US11677323B2

公开(公告)日：2023-06-13

申请号：US17135532

申请日：2020-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Robert Allan Neidorff ,  Robert Kenneth Oppen

IPC: H02M3/158 ,  H02M3/157 ,  H02M1/00

CPC classification number: H02M3/1582 ,  H02M1/0038 ,  H02M3/157

Abstract: In at least some examples, an apparatus includes a logic circuit, first transistor, and second transistor. The logic circuit has a first logic circuit output, and a second logic circuit output. The first transistor has a first transistor gate, a first transistor source, and a first transistor drain, the first transistor gate coupled to the first logic circuit output, the first transistor drain adapted to couple to a voltage source, and the first transistor source coupled to a switching terminal. The second transistor has a second transistor gate, a second transistor source, and a second transistor drain, the second transistor gate coupled to the second logic circuit output, the second transistor drain adapted to couple to the voltage source, and the second transistor source coupled to the switching terminal, wherein a transistor width of the second transistor is larger than a transistor width of the first transistor.