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公开(公告)号:US20190181134A1
公开(公告)日:2019-06-13
申请号:US15838876
申请日:2017-12-12
Applicant: Texas Instruments Incorporated
Inventor: Akram Ali Salman , Guruvayurappan Mathur , Ryo Tsukahara
CPC classification number: H01L27/0262 , H01L27/0259 , H01L27/0623 , H01L29/0646 , H01L29/0804 , H01L29/0821 , H01L29/66234 , H01L29/66287 , H01L29/7302 , H01L29/7304
Abstract: Disclosed examples provide fabrications methods and integrated circuits with back ballasted NPN bipolar transistors which include an n-type emitter in a P doped region, a p-type base with a first side facing the emitter, and an n-type collector laterally spaced from a second side of the base, where the collector includes a first side facing the second side of the base, an opposite second side, a silicided first collector portion and a silicide blocked second collector portion covered with a non-conductive dielectric that extends laterally between the first collector portion and the second side of the collector to provide back side ballasting for lateral breakdown and low current conduction via a deep N doped region while the vertical NPN turns on at a high voltage.
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公开(公告)号:US10700055B2
公开(公告)日:2020-06-30
申请号:US15838876
申请日:2017-12-12
Applicant: Texas Instruments Incorporated
Inventor: Akram Ali Salman , Guruvayurappan Mathur , Ryo Tsukahara
Abstract: Disclosed examples provide fabrications methods and integrated circuits with back ballasted NPN bipolar transistors which include an n-type emitter in a P doped region, a p-type base with a first side facing the emitter, and an n-type collector laterally spaced from a second side of the base, where the collector includes a first side facing the second side of the base, an opposite second side, a silicided first collector portion and a silicide blocked second collector portion covered with a non-conductive dielectric that extends laterally between the first collector portion and the second side of the collector to provide back side ballasting for lateral breakdown and low current conduction via a deep N doped region while the vertical NPN turns on at a high voltage.
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公开(公告)号:US11521961B2
公开(公告)日:2022-12-06
申请号:US16914579
申请日:2020-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Akram Ali Salman , Guruvayurappan Mathur , Ryo Tsukahara
Abstract: An integrated circuit includes a bipolar transistor, e.g. a back-ballasted NPN, that can conduct laterally and vertically. At a low voltage breakdown and low current conduction occur laterally near a substrate surface, while at a higher voltage vertical conduction occurs in a more highly-doped channel below the surface. A relatively high-resistance region at the surface has a low doping level to guide the conduction deeper into the collector.
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公开(公告)号:US20200328204A1
公开(公告)日:2020-10-15
申请号:US16914579
申请日:2020-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Akram Ali Salman , Guruvayurappan Mathur , Ryo Tsukahara
Abstract: Disclosed examples provide fabrications methods and integrated circuits with back ballasted NPN bipolar transistors which include an n-type emitter in a P doped region, a p-type base with a first side facing the emitter, and an n-type collector laterally spaced from a second side of the base, where the collector includes a first side facing the second side of the base, an opposite second side, a silicided first collector portion and a silicide blocked second collector portion covered with a non-conductive dielectric that extends laterally between the first collector portion and the second side of the collector to provide back side ballasting for lateral breakdown and low current conduction via a deep N doped region while the vertical NPN turns on at a high voltage.
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