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公开(公告)号：US12027967B2
公开(公告)日：2024-07-02
申请号：US17490151
申请日：2021-09-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Stephen Isaac Brink , Wei Da
CPC classification number: H02M1/088 , H02M1/0048 , H02M1/32 , H02M3/158 , H02M3/156
Abstract: In an example, a method includes providing a signal to a driver for a switching voltage regulator to turn off a high-side field effect transistor (FET) of the switching voltage regulator. The method also includes reducing a voltage at a source of the high-side FET. The method includes responsive to the signal, turning off a pull-down FET coupled to a gate of the high-side FET. The method also includes commutating current from the high-side FET to a low-side FET.
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公开(公告)号：US10578654B2
公开(公告)日：2020-03-03
申请号：US15858564
申请日：2017-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Siyuan Zhou , Michael James Munroe , Stephen Isaac Brink
Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.
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公开(公告)号：US20190204366A1
公开(公告)日：2019-07-04
申请号：US15858564
申请日：2017-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Siyuan Zhou , Michael James Munroe , Stephen Isaac Brink
CPC classification number: G01R19/2509 , G01R19/2513 , H02M3/158 , H02M2001/0009
Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.
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4.发明申请公开(公告)号：US20180278160A1
公开(公告)日：2018-09-27
申请号：US15927442
申请日：2018-03-21
Applicant: Texas Instruments Incorporated
Inventor： Michael James Munroe , Stephen Isaac Brink
CPC classification number: H02M3/158 , H02M1/088 , H02M3/157 , H02M2001/0012 , H02M2001/0025 , H03M1/124
Abstract: An integrated circuit having at least one electrically-controlled control loop that includes one or more loop error amplifiers also includes an analog-to-digital converter having both an input that operably couples to two inputs of each loop error amplifier and an output that couples to an off-chip hardware component comprising a control circuit. This control circuit reads digital versions that correspond to the loop error amplifier inputs. When a particular first input is greater than a second input, the control circuit sources a calibration signal to modify and offset for the loop error amplifier in a first direction. When the first input is less than the second input, the control circuit sources a calibration signal to modify the offset for the loop error amplifier in a second direction that is different from the aforementioned first direction. By one approach the control circuit also controls a sampling rate of the analog-to-digital converter.
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