公开(公告)号：US10164535B2

公开(公告)日：2018-12-25

申请号：US15822110

申请日：2017-11-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Youhao Xi ,  Eric Wayne Tisinger

IPC: H02M3/158 ,  H03K5/08 ,  G06F1/26 ,  H02M3/335 ,  G05F1/24 ,  H02M1/32 ,  H02M3/156 ,  H02M1/00

Abstract: An SMPS current mode control loop with an adjusted cycle-by-cycle peak current limit for buck and boost (and bidirectional buck/boost) regulators. An SMPS regulator can include a PWM driver to drive switching control signals with a PWM duty cycle to an output terminal OUT, and a PWM controller to control the PWM duty cycle based on a current mode control loop that includes slope compensation to provide a signal VPK corresponding to a current sense signal from a current sense terminal CS, based on sensed peak current through the energy storage element, superimposed with an injected slope compensation current corresponding to a predefined slope compensation based on PWM duty cycle. Adjusted peak limit circuitry generates a signal VLMT corresponding to an adjusted peak current limit based on a pre-defined peak current limit threshold for the energy storage element, including generating a peak limit adjustment current corresponding to the injected slope compensation current, and combining the peak limit adjustment current with the pre-defined peak current limit threshold so that VLMT is substantially constant.

公开(公告)号：US20180145593A1

公开(公告)日：2018-05-24

申请号：US15822110

申请日：2017-11-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Youhao Xi ,  Eric Wayne Tisinger

IPC: H02M3/158 ,  H03K5/08 ,  G06F1/26 ,  H02M1/32 ,  H02M3/335 ,  G05F1/24

CPC classification number: H02M3/1582 ,  G05F1/24 ,  G06F1/26 ,  G06F1/263 ,  H02M1/32 ,  H02M3/156 ,  H02M3/33584 ,  H02M2001/0009 ,  H02M2001/0025 ,  H03K5/086

Abstract: An SMPS current mode control loop with an adjusted cycle-by-cycle peak current limit for buck and boost (and bidirectional buck/boost) regulators. An SMPS regulator can include a PWM driver to drive switching control signals with a PWM duty cycle to an output terminal OUT, and a PWM controller to control the PWM duty cycle based on a current mode control loop that includes slope compensation to provide a signal VPK corresponding to a current sense signal from a current sense terminal CS, based on sensed peak current through the energy storage element, superimposed with an injected slope compensation current corresponding to a predefined slope compensation based on PWM duty cycle. Adjusted peak limit circuitry generates a signal VLMT corresponding to an adjusted peak current limit based on a pre-defined peak current limit threshold for the energy storage element, including generating a peak limit adjustment current corresponding to the injected slope compensation current, and combining the peak limit adjustment current with the pre-defined peak current limit threshold so that VLMT is substantially constant.