SYSTEM FOR CALIBRATING FROM THE GROUND A PAYLOAD OF A SATELLITE

    公开(公告)号:US20200287620A1

    公开(公告)日:2020-09-10

    申请号:US16812095

    申请日:2020-03-06

    申请人: THALES

    发明人: Yann OSTER

    IPC分类号: H04B7/185 H04B7/08

    摘要: A system for calibrating a payload of a satellite, the payload includes a multichannel transmitter or receiver comprising an antenna, one analogue processing chain per channel and a set of digital integrated circuits, the system comprising a calibration device configured to: acquire for all the channels of the transmitter or of the receiver, a digitized calibration signal, set a reference channel and, for each of the other channels, determine a relative complex gain between the channel and the reference channel, for a plurality of frequencies of the calibration signal, correct the relative complex gain of a relative gain of the antenna of the satellite between the channel and the reference channel, estimate a relative delay, estimate a relative phase difference for the set of frequencies, deliver a correction of the relative gain, phase difference and delay of the channel with respect to the reference channel for a set of frequencies.

    METHOD FOR PROTECTING A RECONFIGURABLE DIGITAL INTEGRATED CIRCUIT AGAINST REVERSIBLE ERRORS

    公开(公告)号:US20230051943A1

    公开(公告)日:2023-02-16

    申请号:US17881649

    申请日:2022-08-05

    申请人: THALES

    发明人: Yann OSTER

    摘要: A method for protecting a reconfigurable digital integrated circuit includes multiple parallel processing channels each comprising an instance of a functional logic block and an error detection unit, the method comprising the successive steps of: activating the error detection unit in order to detect an error in at least one processing channel, executing the data replay mechanism, and then activating the error detection unit in order to detect an error in at least one processing channel, if an error is detected again, executing a self-test on each processing channel, for each processing channel, if the self-test does not detect any error, executing the data replay mechanism for this processing channel, if the self-test detects an error, reconfiguring that part of the configuration memory associated with this processing channel.

    SYSTEM AND METHOD FOR ESTIMATING A POINTING ERROR OF A SATELLITE ANTENNA

    公开(公告)号:US20200313757A1

    公开(公告)日:2020-10-01

    申请号:US16826207

    申请日:2020-03-21

    申请人: THALES

    发明人: Yann OSTER

    IPC分类号: H04B7/185 H01Q1/28 H01Q3/02

    摘要: A system for estimating a pointing error of an antenna (ANT) of a satellite, the satellite includes a payload (CU) comprising a multichannel transmitter or receiver comprising a multichannel antenna (ANT), one analogue processing chain per channel and a set of digital integrated circuits (PN), the system comprising an estimation device (EST), implemented aboard the satellite or in a ground station, for estimating a pointing error of the antenna, the device for estimating a pointing error being configured to: acquire, for at least two channels of the transmitter or of the receiver, at least two test signals, each test signal having been transmitted or received by the antenna along a different direction (θA, θB), for at least one pair of acquired test signals, determine, for each test signal, a relative complex gain between the test signal received or transmitted respectively on two distinct channels, determine a comparative measurement between the two test signals from either the ratio between the two relative complex gains and/or the difference between the phases of the two relative complex gains, determine a pointing error (dθ) of the antenna on the basis of the comparative measurement, of the expected directions of transmission or of reception of the test signals (θA, θB) and of a model of the gain of the antenna for each channel and in a plurality of directions.

    System of at Least One Assembly Comprising at Least One Integrated Circuit, the Said Integrated Circuits Being Interconnected According to a Matrix Architecture, Featuring at Least One Optical Interconnection
    5.
    发明申请
    System of at Least One Assembly Comprising at Least One Integrated Circuit, the Said Integrated Circuits Being Interconnected According to a Matrix Architecture, Featuring at Least One Optical Interconnection 审中-公开
    根据最少一个集成电路的至少一个组件的系统,所述集成电路根据矩阵结构互连,具有至少一个光互连

    公开(公告)号:US20130094817A1

    公开(公告)日:2013-04-18

    申请号:US13650795

    申请日:2012-10-12

    申请人: THALES

    IPC分类号: G02B6/43

    摘要: A system of one or more integrated circuits is interconnected to a matrix architecture of rows and columns, a row receiving at least one input for signals, and a column providing at least one output for signals, the interconnections between two integrated circuits of a row and the interconnections between two integrated circuits of a column being electrical, and an assembly of at least one integrated circuit comprising at least one input integrated circuit and at least one output integrated circuit, an input integrated circuit being optionally an output integrated circuit, and at least one optical interconnection connecting an input of a row of the system to a respective input of the input integrated circuits of the assemblies, belonging to said row, or for connecting an output of a column of the system to a respective output of the output integrated circuits of the assemblies, belonging to the said column.

    摘要翻译: 一个或多个集成电路的系统被互连到行和列的矩阵体系结构,一行接收用于信号的至少一个输入,以及一列提供用于信号的至少一个输出,一行的两个集成电路之间的互连和 柱的两个集成电路之间的互连是电的,以及包括至少一个输入集成电路和至少一个输出集成电路的至少一个集成电路的组件,可选地是输出集成电路的输入集成电路,并且至少 一个光学互连将系统的行的输入连接到属于所述行的组件的输入集成电路的相应输入,或用于将系统的列的输出连接到输出集成电路的相应输出 属于所述列的组件。