摘要:
A multichannel transmission system which includes a calibration functionality that allows precise calibration of the frequency conversion chains and of the multiport amplifier of the system to be performed without interruption of service. The proposed calibration makes it possible to correct the defects over the entire frequency band of the system.
摘要:
A system for calibrating a payload of a satellite, the payload includes a multichannel transmitter or receiver comprising an antenna, one analogue processing chain per channel and a set of digital integrated circuits, the system comprising a calibration device configured to: acquire for all the channels of the transmitter or of the receiver, a digitized calibration signal, set a reference channel and, for each of the other channels, determine a relative complex gain between the channel and the reference channel, for a plurality of frequencies of the calibration signal, correct the relative complex gain of a relative gain of the antenna of the satellite between the channel and the reference channel, estimate a relative delay, estimate a relative phase difference for the set of frequencies, deliver a correction of the relative gain, phase difference and delay of the channel with respect to the reference channel for a set of frequencies.
摘要:
A method for protecting a reconfigurable digital integrated circuit includes multiple parallel processing channels each comprising an instance of a functional logic block and an error detection unit, the method comprising the successive steps of: activating the error detection unit in order to detect an error in at least one processing channel, executing the data replay mechanism, and then activating the error detection unit in order to detect an error in at least one processing channel, if an error is detected again, executing a self-test on each processing channel, for each processing channel, if the self-test does not detect any error, executing the data replay mechanism for this processing channel, if the self-test detects an error, reconfiguring that part of the configuration memory associated with this processing channel.
摘要:
A system for estimating a pointing error of an antenna (ANT) of a satellite, the satellite includes a payload (CU) comprising a multichannel transmitter or receiver comprising a multichannel antenna (ANT), one analogue processing chain per channel and a set of digital integrated circuits (PN), the system comprising an estimation device (EST), implemented aboard the satellite or in a ground station, for estimating a pointing error of the antenna, the device for estimating a pointing error being configured to: acquire, for at least two channels of the transmitter or of the receiver, at least two test signals, each test signal having been transmitted or received by the antenna along a different direction (θA, θB), for at least one pair of acquired test signals, determine, for each test signal, a relative complex gain between the test signal received or transmitted respectively on two distinct channels, determine a comparative measurement between the two test signals from either the ratio between the two relative complex gains and/or the difference between the phases of the two relative complex gains, determine a pointing error (dθ) of the antenna on the basis of the comparative measurement, of the expected directions of transmission or of reception of the test signals (θA, θB) and of a model of the gain of the antenna for each channel and in a plurality of directions.
摘要:
A system of one or more integrated circuits is interconnected to a matrix architecture of rows and columns, a row receiving at least one input for signals, and a column providing at least one output for signals, the interconnections between two integrated circuits of a row and the interconnections between two integrated circuits of a column being electrical, and an assembly of at least one integrated circuit comprising at least one input integrated circuit and at least one output integrated circuit, an input integrated circuit being optionally an output integrated circuit, and at least one optical interconnection connecting an input of a row of the system to a respective input of the input integrated circuits of the assemblies, belonging to said row, or for connecting an output of a column of the system to a respective output of the output integrated circuits of the assemblies, belonging to the said column.