System and method for demodulation of resolver outputs

    公开(公告)号:US10911061B2

    公开(公告)日:2021-02-02

    申请号:US15933991

    申请日:2018-03-23

    Abstract: Demodulation circuitry includes an input terminal configured to be coupled to an analog-to-digital converter (ADC) and configured to receive a plurality of ADC outputs. The plurality of ADC outputs are generated based on resolver outputs. The demodulation circuitry also includes a rectifier configured to rectify the plurality of ADC outputs. Rectifying the plurality of ADC outputs preserves a phase of the plurality of ADC outputs. The demodulation circuitry includes amplitude determination circuitry configured to determine, based on the rectified plurality of ADC outputs, demodulated amplitude values corresponding to the resolver outputs. The demodulation circuitry further includes angle computation circuitry configured to generate position outputs based on the demodulated amplitude values.

    SYSTEM AND METHOD FOR DEMODULATION OF RESOLVER OUTPUTS

    公开(公告)号:US20190296761A1

    公开(公告)日:2019-09-26

    申请号:US15933991

    申请日:2018-03-23

    Abstract: Demodulation circuitry includes an input terminal configured to be coupled to an analog-to-digital converter (ADC) and configured to receive a plurality of ADC outputs. The plurality of ADC outputs are generated based on resolver outputs. The demodulation circuitry also includes a rectifier configured to rectify the plurality of ADC outputs. Rectifying the plurality of ADC outputs preserves a phase of the plurality of ADC outputs. The demodulation circuitry includes amplitude determination circuitry configured to determine, based on the rectified plurality of ADC outputs, demodulated amplitude values corresponding to the resolver outputs. The demodulation circuitry further includes angle computation circuitry configured to generate position outputs based on the demodulated amplitude values.

    SYSTEM AND METHOD FOR DUAL SPEED RESOLVER
    3.
    发明申请

    公开(公告)号:US20190293429A1

    公开(公告)日:2019-09-26

    申请号:US15934034

    申请日:2018-03-23

    Abstract: An apparatus includes a coarse resolver configured to output coarse position signals indicative of a coarse position of a drive shaft of a motor. The apparatus also includes a fine resolver configured to output fine position signals indicative of a fine position of the drive shaft of the motor. The apparatus further includes a control circuit. The control circuit is configured to receive the coarse position signals from the coarse resolver and the fine position signals from the fine resolver and generate an initial position output, based on the coarse position signals, that indicates an initial position of the drive shaft. The control circuit is further configured to generate a subsequent position output, based on the fine position signals, that indicates a subsequent position of the drive shaft.

    System and method for dual speed resolver

    公开(公告)号:US10830591B2

    公开(公告)日:2020-11-10

    申请号:US15934034

    申请日:2018-03-23

    Abstract: An apparatus includes a coarse resolver configured to output coarse position signals indicative of a coarse position of a drive shaft of a motor. The apparatus also includes a fine resolver configured to output fine position signals indicative of a fine position of the drive shaft of the motor. The apparatus further includes a control circuit. The control circuit is configured to receive the coarse position signals from the coarse resolver and the fine position signals from the fine resolver and generate an initial position output, based on the coarse position signals, that indicates an initial position of the drive shaft. The control circuit is further configured to generate a subsequent position output, based on the fine position signals, that indicates a subsequent position of the drive shaft.

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