Trigger circuit utilizing a pair of logic gates coupled in parallel current paths
    1.
    发明授权
    Trigger circuit utilizing a pair of logic gates coupled in parallel current paths 失效
    触发电路使用并联电流条件下的逻辑门对

    公开(公告)号:US3649852A

    公开(公告)日:1972-03-14

    申请号:US3649852D

    申请日:1971-03-10

    Inventor: BOHLEY THOMAS K

    CPC classification number: H03K3/037 G01R13/32 H03K3/2897

    Abstract: A triggering circuit for producing an oscilloscope sweep trigger signal employing a pair of parallel current paths, one path including one input of a first logic gate and a current control device coupled thereto and the second path including one input of a second logic gate and a second current control device coupled thereto. Feedback circuits couple the output of each gate to said input of each gate for regenerative feedback. A reset control signal is coupled to a second input of each gate. The output of said one gate is coupled to a third input of said second gate. A sync signal controls each of said current control devices to control the current through each path for operating said gates in sequence, said first gate operating at a preselected level in one half cycle of said sync signal and said second gate operating at a preselected level in the next half cycle of said sync signal to produce said triggering signal.

    Abstract translation: 一种用于产生采用一对并行电流路径的示波器扫描触发信号的触发电路,一个路径包括第一逻辑门的一个输入和耦合到其的电流控制装置,第二路径包括第二逻辑门和第二逻辑门的​​一个输入 电流控制装置耦合到其上。 反馈电路将每个门的输出耦合到每个门的所述输入以用于再生反馈。 复位控制信号耦合到每个门的第二输入端。 所述一个栅极的输出耦合到所述第二栅极的第三输入端。 同步信号控制每个所述电流控制装置以控制通过每个路径的电流以顺序地操作所述门,所述第一门在所述同步信号的一个半周期中以预选电平工作,并且所述第二门在预选电平 所述同步信号的下一个半周期产生所述触发信号。

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