DEFECT INSPECTION APPARATUS AND DEFECT INSPECTION METHOD

    公开(公告)号:US20200089838A1

    公开(公告)日:2020-03-19

    申请号:US16288112

    申请日:2019-02-28

    Abstract: An apparatus for inspecting a defect includes a memory storage and a processing unit coupled to the memory storage. The processing unit is configured to acquire pattern data for one or more patterns implemented on a wafer from a storage device, clip a portion that corresponds to the pattern data from a figure indicated by design data to generate design information and one or more circuit patterns, assign a first set of numbers to the one or more patterns of the pattern data, assign a second set of numbers to the one or more circuit patterns of the design information, generate relation information indicative of one or more correspondences between the first set of numbers and the second set of numbers, verify whether or not the one or more patterns indicated by the pattern data constitute a crucial defect based on the relation information, and send a verification result to a device.

    SEM INSPECTION APPARATUS AND PATTERN MATCHING METHOD

    公开(公告)号:US20190080445A1

    公开(公告)日:2019-03-14

    申请号:US15912611

    申请日:2018-03-06

    Abstract: According to one embodiment, an SEM inspection apparatus includes an arithmetic processor. The arithmetic processor acquires design data corresponding to an inspection region. The arithmetic processor obtains a resistance component between each of wiring lines included in the inspection region and a portion on a substrate connected thereto, on a basis of the design data. The arithmetic processor obtains a capacitance component between each of the wiring lines included in the inspection region and the portion on the substrate connected thereto, on a basis of the design data. The arithmetic processor color-codes the wiring lines included in the inspection region of the design data, on a basis of a combination of the resistance component and the capacitance component. The arithmetic processor corrects a coordinate deviation between an SEM image and the color-coded design data by performing pattern matching between the color-coded design data and the SEM image.

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