公开(公告)号：US20190109196A1

公开(公告)日：2019-04-11

申请号：US16211891

申请日：2018-12-06

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Takeshi SONEHARA ,  Erika KODAMA ,  Nobutaka NAKAMURA ,  Tsuneo INABA ,  Koichi NAKAYAMA

IPC: H01L29/417 ,  H01L27/11556 ,  H01L27/1158 ,  H01L23/528

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of electrodes, extending in a first direction and a second direction orthogonal to the first direction are stacked one over the other, and include opposed sides extending in the second direction, a plurality of protrusion portions extending from the first side of the electrodes and spaced from one another in the second direction, and an extraction portion extending from the second side of the electrode. First and second contact plugs extend in a third direction orthogonal to the first and second directions, one of each contacting one of the extraction portions, wherein the extraction portion extending from the uppermost of the electrodes is located closer to the center of the second side in the second direction, than the location of the extraction portion extending from the lowermost of the electrodes.