METHOD FOR MANUFACTURING DEVICE FABRICATION WAFER

    公开(公告)号:US20220002905A1

    公开(公告)日:2022-01-06

    申请号:US17277378

    申请日:2019-09-19

    Abstract: In a method for manufacturing a device fabrication wafer, an SiC epitaxial wafer that is an SiC wafer 40 having a monocrystalline SiC epitaxial layer formed thereon is subjected to a basal plane dislocation density reduction step of reducing the density of basal plane dislocations existing in the epitaxial layer of the SiC epitaxial wafer, to thereby manufacture the device fabrication wafer for use to fabricate a semiconductor device. In the basal plane dislocation density reduction step, the SiC epitaxial wafer is heated under Si vapor pressure for a predetermined time necessary to reduce the density of basal plane dislocations, without formation of a cap layer on the SiC epitaxial wafer, so that the density of basal plane dislocations is reduced with suppression of surface roughening.

    METHOD FOR MANUFACTURING SINGLE-CRYSTAL SiC, AND HOUSING CONTAINER

    公开(公告)号:US20190010629A1

    公开(公告)日:2019-01-10

    申请号:US16066159

    申请日:2016-12-28

    Abstract: Provided is a method for producing high-purity SiC single crystal, which is applicable to a process of growing SiC single crystal through a solution growth method. This method is for producing SiC single crystal and includes growing, through a solution growth method, an epitaxial layer on a seed material, at least a surface of which is made of SiC, wherein the SiC single crystal is grown so that impurity concentrations therein measured by secondary ion mass spectrometry are very small. Also provided is a housing container for growing SiC single crystal through a solution growth method using a Si melt, including a feed material that is disposed on at least a surface of the housing container and adds, to the Si melt, an additional material that is SiC and/or C. Performing the solution growth method using this housing container can produce high-purity SiC single crystal without any special treatment.

    SiC WAFER MANUFACTURING METHOD
    3.
    发明申请

    公开(公告)号:US20210375613A1

    公开(公告)日:2021-12-02

    申请号:US17262387

    申请日:2019-07-25

    Abstract: In a method for manufacturing an SiC wafer, a work-affected layer removal step of removing a work-affected layer generated in a surface and inside of an SiC wafer is performed, so that the SiC wafer from which the work-affected layer is at least partially removed is manufactured. In the work-affected layer removal step, the SiC wafer having undergone a polishing step is etched with an etching amount of 10 μm or less by being heated under Si vapor pressure so that the work-affected layer is removed. In the polishing step, an oxidizer is used to produce a reaction product in the SiC wafer while abrasive grains are used to remove the reaction product. In the SiC wafer having undergone the polishing step, an internal stress caused by the work-affected layer is present at a location inner than the work-affected layer, and an internal stress of the SiC wafer is reduced by removing the work-affected layer in the work-affected layer removal step.

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