Electronic musical instrument
    3.
    发明授权
    Electronic musical instrument 失效
    电子乐器

    公开(公告)号:US4901615A

    公开(公告)日:1990-02-20

    申请号:US366245

    申请日:1989-06-12

    IPC分类号: G10H7/02 G10H7/00

    CPC分类号: G10H7/008

    摘要: A double buffer system of a small storage capacity is employed for reducing the noise generation in musical waveforms. The operations of the buffers are utilized for performing an interpolation between waveforms and between successive sample points of each waveform, whereby the number of sample points of the waveform being read out is increased to smooth its level variation, producing a good quality musical tone as if it were obtained by quantizing the synthesized musical waveform.

    摘要翻译: 采用小存储容量的双缓冲系统来减少音乐波形中的噪声产生。 缓冲器的操作用于在波形之间和每个波形的连续采样点之间进行插值,从而增加正在读出的波形的采样点的数量以平滑其电平变化,产生好的质量音调,好像 通过量化合成的音乐波形获得。

    Electronic musical instrument with data overflow detector and level
limited data selection circuit
    6.
    发明授权
    Electronic musical instrument with data overflow detector and level limited data selection circuit 失效
    具有数据溢出检测器和电平限制数据选择电路的电子乐器

    公开(公告)号:US4986159A

    公开(公告)日:1991-01-22

    申请号:US456218

    申请日:1989-12-20

    IPC分类号: G10H7/08 G10H5/00 G10H7/00

    CPC分类号: G10H7/00

    摘要: A digital electronic musical instrument for synthesizing a musical waveform by computing high harmonics. The musical instrument includes a musical waveform generator, an overflow detection circuit and a data selection circuit. A musical waveform is preferably added at an adder which outputs an added musical waveform. This output added musical waveform is checked to determine if an overflow condition occurs. A data selection circuit receives the added musical waveform and establishes level limited data and non level limited data. The data selection circuit selects the level limited data upon occurrence of an overflow condition and selects non level limited data when no overflow condition exists.

    摘要翻译: 一种用于通过计算高次谐波合成音乐波形的数字电子乐器。 乐器包括音乐波形发生器,溢出检测电路和数据选择电路。 音乐波形优选地在加法器处添加,该加法器输出相加的音乐波形。 该输出添加的音乐波形被检查以确定是否发生溢出状况。 数据选择电路接收所添加的音乐波形并建立电平限制数据和非电平限制数据。 数据选择电路在发生溢出条件时选择电平限制数据,并且当没有溢出条件时选择非电平限制数据。

    Semiconductor pressure sensor and data processing device
    7.
    发明授权
    Semiconductor pressure sensor and data processing device 失效
    半导体压力传感器和数据处理装置

    公开(公告)号:US07926352B2

    公开(公告)日:2011-04-19

    申请号:US12343236

    申请日:2008-12-23

    IPC分类号: G01L9/00

    CPC分类号: G01L9/04 G01L1/2262

    摘要: For example, to adjust an offset of a pressure sensor, there are provided an external resistor RE and an internal resistor circuit that is connected to both ends of RE and formed in a semiconductor chip such as a processor. The internal resistor circuit includes N pieces of internal resistors RI connected in series between both ends of RE, and (N+1) pieces of switches selecting one of voltages of respective nodes of the serial resistors and outputs the same as a signal. RE has a high absolute value precision of, e.g., several ten ohms to several hundred ohms, and RI has a high relative value precision of, e.g., several kilo-ohms. Therefore, an offset adjustment range is decided at a high absolute value precision mainly by RE, and with regard to the arrangement resolution, a high precision can be obtained along with the relative value precision of the RI.

    摘要翻译: 例如,为了调整压力传感器的偏移量,设置有外部电阻器RE和内部电阻电路,其连接到RE的两端并形成在诸如处理器的半导体芯片中。 内部电阻电路包括在RE的两端串联连接的N个内部电阻器RI和选择串联电阻器的各个节点的电压中的一个的(N + 1)个开关,并输出与信号相同的N个。 RE具有例如几十欧姆至几百欧姆的高绝对值精度,并且RI具有例如几千欧姆的高相对值精度。 因此,偏移调整范围主要由RE决定为高绝对值精度,关于排列分辨率,可以与RI的相对值精度一起获得高精度。

    Data processing device and data processing system
    8.
    发明授权
    Data processing device and data processing system 有权
    数据处理装置和数据处理系统

    公开(公告)号:US08077065B2

    公开(公告)日:2011-12-13

    申请号:US12730978

    申请日:2010-03-24

    IPC分类号: H03M1/00

    摘要: In AD conversion of a voltage under measurement, data continuity is ensured between the result of conversion after amplification by using an amplifier circuit and the result of direct conversion without using the amplifier circuit. In AD conversion operation using a DA converter circuit, an amplifier circuit, and an AD converter circuit under the direction of a control circuit, an analog signal output from the DA converter circuit is directly converted by the AD converter circuit, and also the analog signal is converted therein after amplified by the amplifier circuit with an expected gain of 2n (“n” represents a positive integer). Based on resultant data thus obtained, a gain of the amplifier circuit and an offset thereof are calculated. An analog signal under measurement to be enhanced in bit precision is subjected to amplification by the amplifier circuit and conversion by the AD converter circuit, the offset calculated as mentioned above is subtracted from the result of the conversion, and the result of the subtraction thus performed is multiplied by a ratio of the expected gain to the gain calculated as mentioned above so as to cancel a gain error. Then, based on data with the gain error canceled, acquisition of bit-extended conversion result data is performed to ensure continuity between data having different degrees of bit precision.

    摘要翻译: 在测量电压的AD转换中,通过使用放大器电路在放大后的转换结果与不使用放大器电路的直接转换结果之间确保数据连续性。 在AD转换电路的AD转换动作,放大电路和AD转换电路的控制电路的指导下,从DA转换电路输出的模拟信号由AD转换电路直接转换,模拟信号 在放大器电路放大后以预期的增益为2n转换(“n”表示正整数)。 基于这样获得的结果数据,计算放大器电路的增益及其偏移。 通过放大电路进行放大电路的放大和AD转换电路的转换,将由比特精度提高的模拟信号进行放大,从转换结果中减去如上所述计算出的偏移量,进行相减的结果 乘以预期增益与如上所述计算的增益的比率,以消除增益误差。 然后,基于取消增益误差的数据,执行比特扩展转换结果数据的采集,以确保具有不同位精度的数据之间的连续性。

    Data processing device and data processing system
    9.
    发明授权
    Data processing device and data processing system 有权
    数据处理装置和数据处理系统

    公开(公告)号:US08614636B2

    公开(公告)日:2013-12-24

    申请号:US13279076

    申请日:2011-10-21

    IPC分类号: H03M1/06

    摘要: In AD conversion of a voltage, data continuity is ensured between the results of conversion after amplification and of direct conversion without amplification. In AD conversion operation, an analog signal output from a DA converter circuit is directly converted by an AD converter circuit, and the analog signal is converted after amplification with an expected gain of 2n. Based on resultant data, a gain of an amplifier circuit and an offset thereof are calculated. An analog signal to be enhanced in bit precision is amplified by the amplifier circuit and converted by the AD converter circuit, the offset is subtracted from the resultant conversion, and the result is multiplied by a ratio of the expected gain to the calculated gain to cancel gain error. Based on data with gain error canceled, acquisition of bit-extended conversion result data is performed to ensure continuity between data having different degrees of bit precision.

    摘要翻译: 在电压的AD转换中,确保放大后的转换结果与没有放大的直接转换之间的数据连续性。 在AD转换动作中,由AD转换电路输出的模拟信号由AD转换电路直接转换,模拟信号经过放大后以2n的预期增益转换。 基于所得数据,计算放大器电路的增益及其偏移。 要增强位精度的模拟信号由放大器电路放大并由AD转换器电路转换,从所得转换中减去偏移量,并将结果乘以预期增益与计算增益的比值以取消 增益误差。 基于取消增益误差的数据,执行比特扩展转换结果数据的采集,以确保具有不同位精度的数据之间的连续性。

    Carrier signal generating circuit in video signal recording/reproducing
apparatus
    10.
    发明授权
    Carrier signal generating circuit in video signal recording/reproducing apparatus 失效
    视频信号记录/再现装置中的载波信号发生电路

    公开(公告)号:US5323242A

    公开(公告)日:1994-06-21

    申请号:US464031

    申请日:1990-01-12

    IPC分类号: H04N5/923 H04N9/84 H04M9/80

    CPC分类号: H04N5/923 H04N9/84

    摘要: In a video signal apparatus, a carrier signal generating circuit includes a VCO for generating a signal having a frequency at least twice that of a carrier signal necessary for conversion to a lower band with a sub-carrier in an NTSC system, a one-half divider circuit for dividing the VCO frequency signal by two, a delayed flip-flop circuit for receiving the divided signal and the sub-carrier signal to generate a difference frequency signal, a 1/40 divider circuit for dividing the Q output, a phase comparator circuit for comparing the phases of the 1/40 divided signal and the horizontal synchronizing signal to output a phase difference, a frequency discriminator circuit for comparing the phase of the flip-flop output with the frequency-divided output of the horizontal synchronizing signal to output a frequency error, and a circuit for converting the output of the phase comparator circuit and the frequency error into DC voltages and applying their sum as a control voltage for the VCO. A CR constant control circuit controls the CR constant of a four-phase signal generator for converting the output of the one-half divider circuit into a four-phase signal.

    摘要翻译: 在视频信号装置中,载波信号发生电路包括一个VCO,用于产生具有NTSC系统中的子载波转换成较低频带所需的载波信号的至少两倍的频率的信号,一半 用于将VCO频率信号除以2的分频器电路,用于接收分频信号的延迟触发电路和副载波信号以产生差分频率信号,用于分配Q输出的1/40分频器电路,相位比较器 电路,用于比较1/40分频信号和水平同步信号的相位以输出相位差;频率鉴别器电路,用于将触发器输出的相位与水平同步信号的分频输出进行比较以输出 频率误差,以及用于将相位比较器电路的输出和频率误差转换为直流电压并将其和作为VCO的控制电压的电路。 CR恒定控制电路控制用于将二分频电路的输出转换为四相信号的四相信号发生器的CR常数。