公开(公告)号：US07499592B2

公开(公告)日：2009-03-03

申请号：US11152053

申请日：2005-06-15

申请人： Tadayoshi Nakayama ,  Hiroki Kishi

发明人： Tadayoshi Nakayama ,  Hiroki Kishi

IPC分类号： G06K9/36

CPC分类号： H04N19/184 ,  H04N19/126 ,  H04N19/132 ,  H04N19/60

摘要： This invention improves the arithmetic precision even for image data in which each component of one pixel is expressed by 8 bits by fully utilizing the 12-bit data processing performance of an Extended sequential DCT-based JPEG decoding/encoding apparatus, so that image deterioration due to JPEG compression which is observed in an image portion where the gray levels change slowly, i.e., a pseudo edge can be hardly generated, thus improving the image quality. To this end, a header interpreter interprets the header of encoded data to be decoded to determine if the encoded data is that of 8-bit image data per component or that of 12-bit image data per component, and outputs the result to a bit shift unit, rounding processor, and inverse quantizer. Upon reception of a message indicating that the encoded data is that of 8-bit color image data per component, the bit shift unit stores a result obtained by shifting a quantization step of a quantization table stored in the header by 4 bits in the MSB direction in a quantization table storage unit. The inverse quantizer multiplies a decoded value decoded by a Huffman decoder by the quantization step stored in the quantization table storage unit to generate 12-bit DCT coefficients. The DCT coefficients are processed by an IDCT unit to obtain image data, and the image data is rounded to 8 bits again, thus outputting image data as a decoded result.

摘要翻译： 本发明通过充分利用基于扩展顺序DCT的JPEG解码/编码装置的12位数据处理性能，即使对于一个像素的每个分量由8位表示的图像数据也提高了算术精度，使得图像劣化 到在灰度级变化缓慢的图像部分中观察到的JPEG压缩，即，几乎不能产生伪边缘，从而提高图像质量。 为此，报头解释器解释要解码的编码数据的标题，以确定编码数据是每个分量的8位图像数据还是每个分量的12位图像数据的编码数据，并将结果输出到位 移位单元，舍入处理器和逆量化器。 在接收到指示编码数据是每个分量的8位彩色图像数据的消息的消息时，位移单元将通过将存储在报头中的量化表的量化步长移位4位的结果而获得的结果在MSB方向 在量化表存储单元中。 逆量化器将由霍夫曼解码器解码的解码值乘以存储在量化表存储单元中的量化步长，生成12位DCT系数。 DCT系数由IDCT单元处理以获得图像数据，并且图像数据再次舍入为8位，从而输出图像数据作为解码结果。

公开(公告)号：US20050276500A1

公开(公告)日：2005-12-15

申请号：US11152052

申请日：2005-06-15

申请人： Tadayoshi Nakayama ,  Hiroki Kishi

发明人： Tadayoshi Nakayama ,  Hiroki Kishi

IPC分类号： G06K9/36 ,  H04N7/26 ,  H04N7/30

CPC分类号： H04N19/126 ,  H04N19/60

摘要： This invention generates target encoded data by suppressing an arithmetic precision drop by executing processes such as orthogonal transformation and the like using the number of bits of an input image in place of reducing the number of bits at the time of input upon encoding an image. Upon generating baseline JPEG encoded data, a quantization table for an 8-bit image is stored in a quantization table storage unit. When an interpreter outputs information indicating that each color component per pixel of input image data is 16 bits, a bit shift unit multiplies the quantization table stored in the quantization table storage unit by the 8th power of 2 or {8th power of 2+1}. A quantizer quantizes coefficients output from a DCT unit on the basis of the quantization table stored in the quantization table storage unit, and a Huffman encoder encodes the quantization result to Huffman codes. A header is created by setting information indicating baseline JPEG and the quantization table stored in the quantization table storage unit, thus generating encoded data.

摘要翻译： 本发明通过使用输入图像的位数来执行诸如正交变换等处理的处理代替在编码图像时输入时的位数减少来产生目标编码数据。 在生成基线JPEG编码数据时，将8位图像的量化表存储在量化表存储单元中。 当解释器输出指示输入图像数据的每个像素的每个颜色分量为16位的信息时，位移单元将存储在量化表存储单元中的量化表乘以2的8次幂或2 + 1的第8次幂， 。 量化器基于存储在量化表存储单元中的量化表量化DCT单元输出的系数，霍夫曼编码器将量化结果编码为霍夫曼码。 通过设置指示基线JPEG的信息和存储在量化表存储单元中的量化表来创建报头，从而生成编码数据。

公开(公告)号：US20050276501A1

公开(公告)日：2005-12-15

申请号：US11152053

申请日：2005-06-15

申请人： Tadayoshi Nakayama ,  Hiroki Kishi

发明人： Tadayoshi Nakayama ,  Hiroki Kishi

IPC分类号： G06K9/36 ,  H04N7/26 ,  H04N7/30

CPC分类号： H04N19/184 ,  H04N19/126 ,  H04N19/132 ,  H04N19/60

摘要： This invention improves the arithmetic precision even for image data in which each component of one pixel is expressed by 8 bits by fully utilizing the 12-bit data processing performance of an Extended sequential DCT-based JPEG decoding/encoding apparatus, so that image deterioration due to JPEG compression which is observed in an image portion where the gray levels change slowly, i.e., a pseudo edge can be hardly generated, thus improving the image quality. To this end, a header interpreter interprets the header of encoded data to be decoded to determine if the encoded data is that of 8-bit image data per component or that of 12-bit image data per component, and outputs the result to a bit shift unit, rounding processor, and inverse quantizer. Upon reception of a message indicating that the encoded data is that of 8-bit color image data per component, the bit shift unit stores a result obtained by shifting a quantization step of a quantization table stored in the header by 4 bits in the MSB direction in a quantization table storage unit. The inverse quantizer multiplies a decoded value decoded by a Huffman decoder by the quantization step stored in the quantization table storage unit to generate 12-bit DCT coefficients. The DCT coefficients are processed by an IDCT unit to obtain image data, and the image data is rounded to 8 bits again, thus outputting image data as a decoded result.

摘要翻译： 本发明通过充分利用基于扩展顺序DCT的JPEG解码/编码装置的12位数据处理性能，即使对于一个像素的每个分量由8位表示的图像数据也提高了算术精度，使得图像劣化 到在灰度级变化缓慢的图像部分中观察到的JPEG压缩，即，几乎不能产生伪边缘，从而提高图像质量。 为此，报头解释器解释要解码的编码数据的标题，以确定编码数据是每个分量的8位图像数据还是每个分量的12位图像数据的编码数据，并将结果输出到位 移位单元，舍入处理器和逆量化器。 在接收到指示编码数据是每个分量的8位彩色图像数据的消息的消息时，位移单元将通过将存储在报头中的量化表的量化步长移位4位的结果而获得的结果在MSB方向 在量化表存储单元中。 逆量化器将由霍夫曼解码器解码的解码值乘以存储在量化表存储单元中的量化步长，生成12位DCT系数。 DCT系数由IDCT单元处理以获得图像数据，并且图像数据再次舍入为8位，从而输出图像数据作为解码结果。

公开(公告)号：US07912318B2

公开(公告)日：2011-03-22

申请号：US12521204

申请日：2008-10-06

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： G06K9/36 ,  H04N11/02

CPC分类号： G06F17/145

摘要： This invention provides a lossless 4-point Hadamard transform circuit which can minimize the number of times of addition/subtraction calculations, and reduce the number of times of round processing required to convert data including a fractional part into an integer. To this end, a DC coefficient generating unit summates four input data, and shifts the summation result 1 bit to the right to halve the summation result and to round the halved result by truncating a fractional part of the result. This 1-bit shift right result is output as a DC coefficient. An intermediate data generating unit generates, as intermediate value, a difference value between one input data of the four input data and the DC coefficient obtained by the DC coefficient generating unit. An AC coefficient generating unit generates three AC coefficients by adding the intermediate data generated by the intermediate data generating unit to other three input data.

摘要翻译： 本发明提供了一种无损4点Hadamard变换电路，其可以使加法/减法计算的次数最小化，并减少将包括小数部分的数据转换为整数所需的循环处理次数。 为此，DC系数生成单元将四个输入数据相加，并将求和结果1位向右移动以使求和结果减半，并且通过截断结果的小数部分来舍入该两半的结果。 该1位移位右结果作为直流系数输出。 中间数据生成单元生成四个输入数据的一个输入数据和由DC系数生成单元获得的DC系数之间的差分值作为中间值。 AC系数生成单元通过将由中间数据生成单元生成的中间数据与其他三个输入数据相加来生成3个AC系数。

公开(公告)号：US20100104215A1

公开(公告)日：2010-04-29

申请号：US12521204

申请日：2008-10-06

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： G06K9/36

CPC分类号： G06F17/145

摘要： This invention provides a lossless 4-point Hadamard transform circuit which can minimize the number of times of addition/subtraction calculations, and reduce the number of times of round processing required to convert data including a fractional part into an integer. To this end, a DC coefficient generating unit summates four input data, and shifts the summation result 1 bit to the right to halve the summation result and to round the halved result by truncating a fractional part of the result. This 1-bit shift right result is output as a DC coefficient. An intermediate data generating unit generates, as intermediate value, a difference value between one input data of the four input data and the DC coefficient obtained by the DC coefficient generating unit. An AC coefficient generating unit generates three AC coefficients by adding the intermediate data generated by the intermediate data generating unit to other three input data.

摘要翻译： 本发明提供了一种无损4点Hadamard变换电路，其可以使加法/减法计算的次数最小化，并减少将包括小数部分的数据转换为整数所需的循环处理次数。 为此，DC系数生成单元将四个输入数据相加，并将求和结果1位向右移动以使求和结果减半，并且通过截断结果的小数部分来舍入该两半的结果。 该1位移位右结果作为直流系数输出。 中间数据生成单元生成四个输入数据的一个输入数据和由DC系数生成单元获得的DC系数之间的差分值作为中间值。 AC系数生成单元通过将由中间数据生成单元生成的中间数据与其他三个输入数据相加来生成3个AC系数。

公开(公告)号：US07643695B2

公开(公告)日：2010-01-05

申请号：US11492812

申请日：2006-07-26

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： G06K9/00

CPC分类号： H04N19/85 ,  H04N19/126 ,  H04N19/13 ,  H04N19/134 ,  H04N19/176 ,  H04N19/184 ,  H04N19/60

摘要： This invention allows Huffman encoding using a common Huffman table according to basic quantization values Qi,j even when image data expressed by n bits falling within the range from L to K is JPEG-coded, and can suppress the Huffman table size from increasing. To this end, a basic quantization table storage unit stores quantization step values Q0,0 to Q7,7 used in baseline JPEG coding. A minimum quantization step generator outputs a minimum quantization step value Qn—min to a comparator/selector according to the number n of bits of each color component of image data to be coded. The comparator/selector compares the quantization step values Q0,0 to Q7,7 with Qn—min and selects larger ones, and outputs the comparison results to a quantizer as Q′i,j. The quantizer stores Q′i,j in a quantization table storage unit and quantizes orthogonal transformation coefficients output from a DCT transformer.

摘要翻译： 本发明即使当由L到K的范围内的n位表示的图像数据被JPEG编码时，也可以使用基于基本量化值Qi，j的公共霍夫曼表进行霍夫曼编码，并且可以抑制霍夫曼表的大小增加。 为此，基本量化表存储单元存储在基线JPEG编码中使用的量化步长值Q0,0至Q7,7。 最小量化级发生器根据要编码的图像数据的每个颜色分量的位数n向比较器/选择器输出最小量化步长值Qn-min。 比较器/选择器将量化步长值Q0,0至Q7,7与Qn-min进行比较，并选择较大的值，并将比较结果输出到量化器作为Q'i，j。 量化器将Q'i，j存储在量化表存储单元中，并对从DCT变换器输出的正交变换系数进行量化。

公开(公告)号：US20090174201A1

公开(公告)日：2009-07-09

申请号：US12401886

申请日：2009-03-11

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： B60R19/30

CPC分类号： F16B5/0635 ,  B60R13/04 ,  B60R2019/525 ,  Y10T29/4987 ,  Y10T70/5761

摘要： A bumper is provided with to-be-engaged projections, a radiator grille is provided with engaging projections. The radiator grille is allowed to move and approach bumper rearward of a vehicle. According to this configuration, the engaging projections engage the to-be-engaged projections and they are engaged with and fixed to each other. At this time, a bumper-side seizing unit of the bumper is fitted into a grille-side seizing unit of the radiator grille, thereby limiting the vertical direction. In an engaged state between the engaging projections and the to-be-engaged projections, an inclining surface of one of the engaging projections comes into contact with a rearward inclining surface of the one of the to-be-engaged projections, and an inclining surface of the other engaging projection is separated from a rearward inclining surface of the other to-be-engaged projection.

摘要翻译： 保险杠设置有待接合的突起，散热器格栅设有接合突起。 散热器格栅被允许移动并接近车辆后方的保险杠。 根据该构造，接合突起与被接合突起接合，并且彼此接合并固定。 此时，保险杠的保险杠侧卡止单元装配在散热器格栅的格栅侧卡住单元中，从而限制了垂直方向。 在接合突起和被接合突起之间的接合状态中，一个接合突起的倾斜表面与被接合突起中的一个的向后倾斜表面接触，并且倾斜表面 的另一个接合突起与另一个待接合突起的向后倾斜表面分离。

公开(公告)号：US20080303952A1

公开(公告)日：2008-12-11

申请号：US12133574

申请日：2008-06-05

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： H04N5/00

CPC分类号： H04N5/21 ,  G06T5/002 ,  G06T5/10 ,  G06T5/50 ,  G06T2207/10121 ,  G06T2207/20016

摘要： An image processing apparatus includes a feedback unit configured to perform first nonlinear conversion of a signal obtained by subtracting a value of a subtraction image signal from that of a current-frame image signal, and to obtain the next subtraction signal by subtracting a signal obtained by performing the first nonlinearly conversion from the current-frame image signal, and a noise reduction unit configured to perform second nonlinear conversion of a signal obtained by subtracting a value of the subtraction image signal from that of the current-frame image signal, and to obtain an output image signal by subtracting a signal obtained by performing the second nonlinear from the current-frame image signal.

摘要翻译： 一种图像处理装置，包括：反馈单元，被配置为对从当前帧图像信号中减去减法图像信号的值得到的信号进行第一非线性转换，并且通过减去由 从当前帧图像信号执行第一非线性转换，以及噪声降低单元，被配置为对通过从当前帧图像信号的减去图像信号的值减去得到的信号进行第二非线性转换，并获得 通过从当前帧图像信号中减去通过执行第二非线性而获得的信号的输出图像信号。

公开(公告)号：US20070025632A1

公开(公告)日：2007-02-01

申请号：US11492812

申请日：2006-07-26

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： G06K9/00 ,  G06K9/36

CPC分类号： H04N19/85 ,  H04N19/126 ,  H04N19/13 ,  H04N19/134 ,  H04N19/176 ,  H04N19/184 ,  H04N19/60

摘要： This invention allows Huffman encoding using a common Huffman table according to basic quantization values Qi,j even when image data expressed by n bits falling within the range from L to K is JPEG-coded, and can suppress the Huffman table size from increasing. To this end, a basic quantization table storage unit stores quantization step values Q0,0 to Q7,7 used in baseline JPEG coding. A minimum quantization step generator outputs a minimum quantization step value Qn—min to a comparator/selector according to the number n of bits of each color component of image data to be coded. The comparator/selector compares the quantization step values Q0,0 to Q7,7 with Qn—min and selects larger ones, and outputs the comparison results to a quantizer as Q′i,j. The quantizer stores Q′i,j in a quantization table storage unit and quantizes orthogonal transformation coefficients output from a DCT transformer.

摘要翻译： 本发明即使当由L到K的范围内的n位表示的图像数据被JPEG编码时，也可以根据基本量化值Q SUB，j，使用公共霍夫曼表进行霍夫曼编码，并且可以抑制 霍夫曼表尺寸从不断增加。 为此，基本量化表存储单元将用于基线JPEG编码的量化步长值Q 0 0 0存储到Q 7,7。 最小量化步长生成器将比较器/选择器的最小量化步长值输出到根据本发明的一个比较器/选择器的最小量化步长值 要编码的图像数据的每个颜色分量的位数n。 比较器/选择器将量化步长值Q 0> 0,0 与Q＆lt; N＆gt; 7,7＆lt;＆lt; SUB＆gt;＆lt; SUB2＆gt; / SUB2> 分，并选择较大的，并将比较结果输出到量化器作为Q'，i，j。 量化器在量化表存储单元中存储Q'，i，j，并量化从DCT变换器输出的正交变换系数。

公开(公告)号：US06904177B2

公开(公告)日：2005-06-07

申请号：US10092573

申请日：2002-03-08

申请人： Tadayoshi Nakayama

发明人： Tadayoshi Nakayama

IPC分类号： G06F17/14 ,  G06K9/36

CPC分类号： G06F17/148

摘要： A two-dimensional wavelet transform processing apparatus, more effectively utilizing hardware resource, is realized with reduced hardware construction. For this purpose, the filter processing apparatus has a vertical DWT processor (901) for performing filter processing on image data and outputting 2 types of data obtained by the processing as 1 pair of data, a rotation unit (903) for rearranging the data outputted from the vertical DWT processor by rotating the data by 90° by 2 pairs and outputting the data, and a horizontal DWT processor (905) for performing filter processing on the image data rearranged by the rotation unit and outputting 2 types of data obtained by the processing as 1 pair of data.

摘要翻译： 通过降低硬件结构实现了更有效地利用硬件资源的二维小波变换处理装置。 为此，滤波处理装置具有垂直DWT处理器（901），用于对图像数据进行滤波处理，并输出通过处理获得的2种数据作为1对数据;旋转单元（903），用于重新排列输出的数据 从垂直DWT处理器通过旋转数据90°乘以2对并输出数据;以及水平DWT处理器（905），用于对由旋转单元重新排列的图像数据执行滤波处理，并输出由 处理为1对数据。