Method for forming self-aligned local-halo metal-oxide-semiconductor device

    公开(公告)号:US06489206B2

    公开(公告)日:2002-12-03

    申请号:US09814411

    申请日:2001-03-22

    IPC分类号: H01L21336

    摘要: A method for forming a self-aligned local-halo metal-oxide-semiconductor device is provided. The present method is characterized in that a pair of first sidewall spacers is firstly formed on opposite sides of a gate electrode over a semiconductor substrate, and then a pair of second sidewall spacers is formed, each of which formed on one side of each first sidewall spacer. Next, a raised source/drain is formed upward on the substrate between each shallow trench isolation and each second sidewall spacer. Thereafter, the pair of second sidewall spacers is stripped away. Then, the gate electrode and raised source/drain act as the self-aligned ion implant masks, a LDD/Halo implantation is performed to form a local LDD/Halo diffusion region between each shallow trench isolation and each of the first sidewall spacers.

    Fabrication of a shallow trench isolation by plasma oxidation
    2.
    发明授权
    Fabrication of a shallow trench isolation by plasma oxidation 失效
    通过等离子体氧化制造浅沟槽隔离

    公开(公告)号:US06368941B1

    公开(公告)日:2002-04-09

    申请号:US09707995

    申请日:2000-11-08

    IPC分类号: H01L2176

    CPC分类号: H01L21/76235

    摘要: The present invention provides a method of fabricating a STI on a wafer to eliminate the common occurrence of junction leakage in the prior art. The method begins by forming a patterned hard mask on a silicon substrate. The patterned hard mask is a laminated layer comprising a pad oxide and a silicon nitride layer, and exposes a portion of the surface of the silicon substrate. The exposed portion of the silicon substrate is then dry etched to form a trench in the silicon substrate having a surface and a surface. Next, a portion of the pad oxide is wet etched around the STI corners of the trench to expose a portion of the top surface of the silicon substrate surrounding the periphery of the trench. A microwave-excited Kr/O2 plasma is used to oxidize both the interior surface of the trench and the exposed top surface of the silicon substrate located beneath the layer of silicon nitride surrounding the periphery of the trench at a temperature of 400° C. to form a silicon dioxide liner of uniform thickness on the STI surfaces and surface. Finally, an insulating material, such as HDP oxide, is deposited on the silicon substrate to fill in the trench followed by a chemical-mechanical polishing.

    摘要翻译: 本发明提供了一种在晶片上制造STI以消除现有技术中常见的结漏现象的方法。 该方法开始于在硅衬底上形成图案化的硬掩模。 图案化的硬掩模是包括衬垫氧化物和氮化硅层的层压层,并且暴露出硅衬底的表面的一部分。 然后将硅衬底的暴露部分干蚀刻以在具有<100>表面和<111>表面的硅衬底中形成沟槽。 接下来,将衬垫氧化物的一部分在沟槽的STI拐角周围进行湿蚀刻,以暴露围绕沟槽周边的硅衬底顶表面的一部分。 使用微波激发的Kr / O 2等离子体在400℃的温度下氧化沟槽的内表面和暴露在位于沟槽周边的氮化硅层下方的硅衬底的顶表面, 在STI <100>表面和<111>表面上形成均匀厚度的二氧化硅衬垫。 最后,将诸如HDP氧化物的绝缘材料沉积在硅衬底上以填充沟槽,然后进行化学机械抛光。

    Method of fabricating semiconductor device
    3.
    发明授权
    Method of fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US08043919B2

    公开(公告)日:2011-10-25

    申请号:US11938506

    申请日:2007-11-12

    IPC分类号: H01L21/336 H01L21/02

    摘要: A method of fabricating a semiconductor device is provided. A gate structure is formed on a substrate and then a first spacer is formed at a sidewall of the gate structure. Next, recesses are respectively formed in the substrate at two sides of the first spacer. Thereafter, a buffer layer and a doped semiconductor compound layer are formed in each recess. An extra implantation region is respectively formed on the surfaces of each buffer layer and each doped semiconductor compound layer. Afterward, source/drain contact regions are formed in the substrate at two sides of the gate structure.

    摘要翻译: 提供一种制造半导体器件的方法。 栅极结构形成在衬底上,然后在栅极结构的侧壁处形成第一间隔物。 接下来,在第一间隔物的两侧分别在基板上形成凹部。 此后,在每个凹部中形成缓冲层和掺杂的半导体化合物层。 在每个缓冲层和每个掺杂的半导体化合物层的表面上分别形成一个额外的注入区。 之后,在栅极结构的两侧在衬底中形成源极/漏极接触区域。

    METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20090124056A1

    公开(公告)日:2009-05-14

    申请号:US11938506

    申请日:2007-11-12

    IPC分类号: H01L21/8236

    摘要: A method of fabricating a semiconductor device is provided. A gate structure is formed on a substrate and then a first spacer is formed at a sidewall of the gate structure. Next, recesses are respectively formed in the substrate at two sides of the first spacer. Thereafter, a buffer layer and a doped semiconductor compound layer are formed in each recess. An extra implantation region is respectively formed on the surfaces of each buffer layer and each doped semiconductor compound layer. Afterward, source/drain contact regions are formed in the substrate at two sides of the gate structure.

    摘要翻译: 提供一种制造半导体器件的方法。 栅极结构形成在衬底上,然后在栅极结构的侧壁处形成第一间隔物。 接下来,在第一间隔物的两侧分别在基板上形成凹部。 此后,在每个凹部中形成缓冲层和掺杂的半导体化合物层。 在每个缓冲层和每个掺杂的半导体化合物层的表面上分别形成一个额外的注入区。 之后,在栅极结构的两侧在衬底中形成源极/漏极接触区域。