公开(公告)号：US20240404991A1

公开(公告)日：2024-12-05

申请号：US18328430

申请日：2023-06-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Wen Shih ,  Min-Chien Hsiao ,  Kuo-Chiang Ting ,  Yen-Ming Chen ,  Ashish Kumar Sahoo ,  Chen-Sheng Lin ,  Hsin-Yu Pan

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: Embodiments include methods of forming three-dimensional packages and the packages resulting therefrom. The packages may utilize a bridge die to electrically connect one die to another die and at least one additional die adjacent to the bridge die. The height-to-width ratio of the gap between the bridge die and the at least one additional die is controlled by thinning the bridge die to be thinner than the at least one additional die. The packages may utilize landing structures to adjoin a dielectric material of an attached die to a metallic landing structure of a base die.

公开(公告)号：US20240371822A1

公开(公告)日：2024-11-07

申请号：US18459171

申请日：2023-08-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Sheng Lin ,  Chao-Wen Shih ,  Kuo-Chiang Ting ,  Yen-Ming Chen

IPC: H01L23/00 ,  H01L21/66

Abstract: A method includes: forming first semiconductor dies in a first wafer, each die of the first semiconductor dies comprising: first active devices over a front-side of a first semiconductor substrate; performing first probe tests on the first wafer; based on the first probe tests, classifying each die of the first semiconductor dies as a first good die, a first marginal die, or a first bad die; forming second semiconductor dies in a second wafer; performing second probe tests on the second wafer; based on the second probe tests, classifying each die of the second semiconductor dies as a second good die, a second marginal die, or a second bad die; and bonding the second wafer to the first wafer, each die of the first semiconductor dies aligning with a corresponding die of the second semiconductor dies.