公开(公告)号：US20230163075A1

公开(公告)日：2023-05-25

申请号：US17743849

申请日：2022-05-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Hsien Lin ,  Ting-Gang Chen ,  Chin-Wei Lin ,  Chi On Chui

IPC: H01L23/535 ,  H01L29/78 ,  H01L23/532 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L23/535 ,  H01L29/7851 ,  H01L23/53242 ,  H01L23/53257 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76895 ,  H01L29/66795

Abstract: Methods for selectively depositing a metal layer over a gate structure and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a channel region over a semiconductor substrate; a gate structure over the channel region; a gate spacer adjacent the gate structure; a first dielectric layer adjacent the gate spacer; a barrier layer contacting a top surface of the gate spacer and a side surface of the first dielectric layer, the barrier layer including a nitride; and a metal layer over the gate structure adjacent the barrier layer, the metal layer having a first width equal to a second width of the gate structure.