公开(公告)号：US10367059B2

公开(公告)日：2019-07-30

申请号：US15700115

申请日：2017-09-09

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cong-Min Fang ,  Kang-Min Kuo ,  Shi-Min Wu

IPC: H01L29/06 ,  H01L21/762

Abstract: A method of manufacturing a semiconductor structure includes the following steps. A first raised portion is formed on a semiconductor substrate. The height of the first raised portion is reduced, and a dielectric material is formed over the first raised portion. The dielectric material is annealed such that the first raised portion is tilted.

公开(公告)号：US11063039B2

公开(公告)日：2021-07-13

申请号：US16048744

申请日：2018-07-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cong-Min Fang ,  Chih-Lin Wang ,  Kang-Min Kuo

IPC: H01L21/3213 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/02 ,  H01L29/49 ,  H01L29/66

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first source region, a second source region, a first drain region, and a second drain region. The semiconductor device structure includes a first gate structure over the substrate and between the first source region and the first drain region. The semiconductor device structure includes a second gate structure over the substrate and between the second source region and the second drain region. A first thickness of the first gate structure is greater than a second thickness of the second gate structure. A first gate width of the first gate structure is less than a second gate width of the second gate structure.

公开(公告)号：US11152462B2

公开(公告)日：2021-10-19

申请号：US16525346

申请日：2019-07-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cong-Min Fang ,  Kang-Min Kuo ,  Shi-Min Wu

IPC: H01L29/06 ,  H01L21/762

Abstract: A semiconductor device includes a semiconductive substrate, a first semiconductive fin and a second semiconductive fin extending upwards from the semiconductive substrate, an isolation structure at least partially between the first semiconductive fin and the second semiconductive fin, a first semiconductive raised portion and a second semiconductive raised portion. The first semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive fin and the second semiconductive fin. A top surface of the first semiconductive fin is higher than a top surface of the first semiconductive raised portion. The second semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive raised portion and the second semiconductive fin.

公开(公告)号：US10096596B2

公开(公告)日：2018-10-09

申请号：US14970036

申请日：2015-12-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cong-Min Fang ,  Chih-Lin Wang ,  Kang-Min Kuo

IPC: H01L21/3213 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/02 ,  H01L29/49 ,  H01L29/66

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first source region, a second source region, a first drain region, and a second drain region. The semiconductor device structure includes a first gate structure over the substrate and between the first source region and the first drain region. The semiconductor device structure includes a second gate structure over the substrate and between the second source region and the second drain region. A first thickness of the first gate structure is greater than a second thickness of the second gate structure. A first gate width of the first gate structure is less than a second gate width of the second gate structure.

公开(公告)号：US09761658B2

公开(公告)日：2017-09-12

申请号：US14718841

申请日：2015-05-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cong-Min Fang ,  Kang-Min Kuo ,  Shi-Min Wu

IPC: H01L21/70 ,  H01L29/06 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L21/76229 ,  H01L29/0657

Abstract: A semiconductor structure includes a semiconductor substrate, a first active area, a second active area, a first trench, at least one raised portion, and a first dielectric. The first active area is in the semiconductor substrate. The second active area is in the semiconductor substrate. The first trench is in the semiconductor substrate and separates the first active area and the second active area from each other. The raised portion is raised from the semiconductor substrate and is disposed in the first trench. The first dielectric is in the first trench and covers the raised portion.